Message ID | 1585306559-13973-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 087905f925c93131611d78526fb40e90cd7e7731 |
Headers | show |
Series | [1/3] dt-bindings: arm: fsl-scu: Add imx8dxl pinctrl support | expand |
On Fri, 27 Mar 2020 18:55:57 +0800, Anson Huang wrote: > Update binding doc to support i.MX8DXL pinctrl. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
On Fri, Mar 27, 2020 at 12:03 PM Anson Huang <Anson.Huang@nxp.com> wrote: > Update binding doc to support i.MX8DXL pinctrl. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Patch applied. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index 7f42cc3..3910d2c 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -108,7 +108,8 @@ This binding uses the i.MX common pinctrl binding[3]. Required properties: - compatible: Should be one of: "fsl,imx8qm-iomuxc", - "fsl,imx8qxp-iomuxc". + "fsl,imx8qxp-iomuxc", + "fsl,imx8dxl-iomuxc". Required properties for Pinctrl sub nodes: - fsl,pins: Each entry consists of 3 integers which represents @@ -116,7 +117,8 @@ Required properties for Pinctrl sub nodes: integers <pin_id mux_mode> are specified using a PIN_FUNC_ID macro, which can be found in <dt-bindings/pinctrl/pads-imx8qm.h>, - <dt-bindings/pinctrl/pads-imx8qxp.h>. + <dt-bindings/pinctrl/pads-imx8qxp.h>, + <dt-bindings/pinctrl/pads-imx8dxl.h>. The last integer CONFIG is the pad setting value like pull-up on this pin.
Update binding doc to support i.MX8DXL pinctrl. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)