| Message ID | 20200414181012.114905-1-robert.marko@sartura.hr (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/3] net: phy: mdio: add IPQ40xx MDIO driver | expand |
Hi Robert This is looking better > +#include <linux/delay.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/mutex.h> I don't think you need this header. There are no mutexes here. > +#include <linux/io.h> > +#include <linux/of_address.h> > +#include <linux/of_mdio.h> > +#include <linux/phy.h> > +#include <linux/platform_device.h> > + > +#define MDIO_CTRL_0_REG 0x40 > +#define MDIO_CTRL_1_REG 0x44 > +#define MDIO_CTRL_2_REG 0x48 > +#define MDIO_CTRL_3_REG 0x4c > +#define MDIO_CTRL_4_REG 0x50 So your next version will hopefully have better names. > +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) > +{ > + struct ipq40xx_mdio_data *priv = bus->priv; > + int i; > + > + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { > + unsigned int busy; > + > + busy = readl(priv->membase + MDIO_CTRL_4_REG) & > + MDIO_CTRL_4_ACCESS_BUSY; > + if (!busy) > + return 0; > + > + /* BUSY might take to be cleard by 15~20 times of loop */ > + udelay(IPQ40XX_MDIO_DELAY); > + } > + > + dev_err(bus->parent, "MDIO operation timed out\n"); > + > + return -ETIMEDOUT; > +} You can probably make use of include/linux/iopoll.h Andrew
On 4/14/2020 11:10 AM, Robert Marko wrote: > This patch adds the driver for the MDIO interface > inside of Qualcomm IPQ40xx series SoC-s. > > Signed-off-by: Christian Lamparter <chunkeey@gmail.com> > Signed-off-by: Robert Marko <robert.marko@sartura.hr> > Cc: Luka Perkov <luka.perkov@sartura.hr> > --- > Changes from v1 to v2: > * Remove magic default value > * Remove lockdep_assert_held > * Add C45 check > * Simplify the driver > * Drop device and mii_bus structs from private struct > * Use devm_mdiobus_alloc_size() > > drivers/net/phy/Kconfig | 7 ++ > drivers/net/phy/Makefile | 1 + > drivers/net/phy/mdio-ipq40xx.c | 176 +++++++++++++++++++++++++++++++++ > 3 files changed, 184 insertions(+) > create mode 100644 drivers/net/phy/mdio-ipq40xx.c > > diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig > index 3fa33d27eeba..815d52fa6080 100644 > --- a/drivers/net/phy/Kconfig > +++ b/drivers/net/phy/Kconfig > @@ -157,6 +157,13 @@ config MDIO_I2C > > This is library mode. > > +config MDIO_IPQ40XX > + tristate "Qualcomm IPQ40xx MDIO interface" > + depends on HAS_IOMEM && OF You can drop the OF dependency here, of_mdiobus_register() becomes mdiobus_register() with CONFIG_OF=n. [snip] > +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) > +{ > + struct ipq40xx_mdio_data *priv = bus->priv; > + int i; > + > + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { > + unsigned int busy; > + > + busy = readl(priv->membase + MDIO_CTRL_4_REG) & > + MDIO_CTRL_4_ACCESS_BUSY; > + if (!busy) > + return 0; > + > + /* BUSY might take to be cleard by 15~20 times of loop */ typo: cleard instead of cleared. > + udelay(IPQ40XX_MDIO_DELAY); > + } consider using readl_poll_timeout() for this loop. With that fixed: Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
On Tue, Apr 14, 2020 at 08:10:11PM +0200, Robert Marko wrote: > diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c > new file mode 100644 > index 000000000000..d8c11c621f20 > --- /dev/null > +++ b/drivers/net/phy/mdio-ipq40xx.c > @@ -0,0 +1,176 @@ > +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause > +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */ > +/* Copyright (c) 2020 Sartura Ltd. */ > + > +#include <linux/delay.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/mutex.h> > +#include <linux/io.h> > +#include <linux/of_address.h> > +#include <linux/of_mdio.h> > +#include <linux/phy.h> > +#include <linux/platform_device.h> > + Looking at how these registers are used, they could be renamed: > +#define MDIO_CTRL_0_REG 0x40 This seems to be unused. > +#define MDIO_CTRL_1_REG 0x44 MDIO_ADDR_REG > +#define MDIO_CTRL_2_REG 0x48 MDIO_DATA_WRITE_REG > +#define MDIO_CTRL_3_REG 0x4c MDIO_DATA_READ_REG > +#define MDIO_CTRL_4_REG 0x50 > +#define MDIO_CTRL_4_ACCESS_BUSY BIT(16) > +#define MDIO_CTRL_4_ACCESS_START BIT(8) > +#define MDIO_CTRL_4_ACCESS_CODE_READ 0 > +#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1 MDIO_CMD_* ? > + > +#define IPQ40XX_MDIO_RETRY 1000 > +#define IPQ40XX_MDIO_DELAY 10 > + > +struct ipq40xx_mdio_data { > + void __iomem *membase; > +}; > + > +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) > +{ > + struct ipq40xx_mdio_data *priv = bus->priv; > + int i; > + > + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { > + unsigned int busy; > + > + busy = readl(priv->membase + MDIO_CTRL_4_REG) & > + MDIO_CTRL_4_ACCESS_BUSY; > + if (!busy) > + return 0; > + > + /* BUSY might take to be cleard by 15~20 times of loop */ > + udelay(IPQ40XX_MDIO_DELAY); > + } > + > + dev_err(bus->parent, "MDIO operation timed out\n"); > + > + return -ETIMEDOUT; > +} > + > +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum) > +{ > + struct ipq40xx_mdio_data *priv = bus->priv; > + int value = 0; > + unsigned int cmd = 0; No need to initialise either of these, and you can eliminate "value" which will then satisfy davem's requirement for reverse-christmas-tree ordering of variable declarations. > + > + /* Reject clause 45 */ > + if (regnum & MII_ADDR_C45) > + return -EOPNOTSUPP; > + > + if (ipq40xx_mdio_wait_busy(bus)) > + return -ETIMEDOUT; > + > + /* issue the phy address and reg */ > + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); > + > + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_READ; > + > + /* issue read command */ > + writel(cmd, priv->membase + MDIO_CTRL_4_REG); > + > + /* Wait read complete */ > + if (ipq40xx_mdio_wait_busy(bus)) > + return -ETIMEDOUT; > + > + /* Read data */ > + value = readl(priv->membase + MDIO_CTRL_3_REG); > + > + return value; > +} > + > +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum, > + u16 value) > +{ > + struct ipq40xx_mdio_data *priv = bus->priv; > + unsigned int cmd = 0; No need to initialise cmd.
I have sent a v3. I tried to incorporate all of your remarks there. Thanks Robert On Wed, Apr 15, 2020 at 11:33 AM Russell King - ARM Linux admin <linux@armlinux.org.uk> wrote: > > On Tue, Apr 14, 2020 at 08:10:11PM +0200, Robert Marko wrote: > > diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c > > new file mode 100644 > > index 000000000000..d8c11c621f20 > > --- /dev/null > > +++ b/drivers/net/phy/mdio-ipq40xx.c > > @@ -0,0 +1,176 @@ > > +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause > > +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */ > > +/* Copyright (c) 2020 Sartura Ltd. */ > > + > > +#include <linux/delay.h> > > +#include <linux/kernel.h> > > +#include <linux/module.h> > > +#include <linux/mutex.h> > > +#include <linux/io.h> > > +#include <linux/of_address.h> > > +#include <linux/of_mdio.h> > > +#include <linux/phy.h> > > +#include <linux/platform_device.h> > > + > > Looking at how these registers are used, they could be renamed: > > > +#define MDIO_CTRL_0_REG 0x40 > > This seems to be unused. > > > +#define MDIO_CTRL_1_REG 0x44 > > MDIO_ADDR_REG > > > +#define MDIO_CTRL_2_REG 0x48 > > MDIO_DATA_WRITE_REG > > > +#define MDIO_CTRL_3_REG 0x4c > > MDIO_DATA_READ_REG > > > +#define MDIO_CTRL_4_REG 0x50 > > +#define MDIO_CTRL_4_ACCESS_BUSY BIT(16) > > +#define MDIO_CTRL_4_ACCESS_START BIT(8) > > +#define MDIO_CTRL_4_ACCESS_CODE_READ 0 > > +#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1 > > MDIO_CMD_* ? > > > + > > +#define IPQ40XX_MDIO_RETRY 1000 > > +#define IPQ40XX_MDIO_DELAY 10 > > + > > +struct ipq40xx_mdio_data { > > + void __iomem *membase; > > +}; > > + > > +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) > > +{ > > + struct ipq40xx_mdio_data *priv = bus->priv; > > + int i; > > + > > + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { > > + unsigned int busy; > > + > > + busy = readl(priv->membase + MDIO_CTRL_4_REG) & > > + MDIO_CTRL_4_ACCESS_BUSY; > > + if (!busy) > > + return 0; > > + > > + /* BUSY might take to be cleard by 15~20 times of loop */ > > + udelay(IPQ40XX_MDIO_DELAY); > > + } > > + > > + dev_err(bus->parent, "MDIO operation timed out\n"); > > + > > + return -ETIMEDOUT; > > +} > > + > > +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum) > > +{ > > + struct ipq40xx_mdio_data *priv = bus->priv; > > + int value = 0; > > + unsigned int cmd = 0; > > No need to initialise either of these, and you can eliminate "value" > which will then satisfy davem's requirement for reverse-christmas-tree > ordering of variable declarations. > > > + > > + /* Reject clause 45 */ > > + if (regnum & MII_ADDR_C45) > > + return -EOPNOTSUPP; > > + > > + if (ipq40xx_mdio_wait_busy(bus)) > > + return -ETIMEDOUT; > > + > > + /* issue the phy address and reg */ > > + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); > > + > > + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_READ; > > + > > + /* issue read command */ > > + writel(cmd, priv->membase + MDIO_CTRL_4_REG); > > + > > + /* Wait read complete */ > > + if (ipq40xx_mdio_wait_busy(bus)) > > + return -ETIMEDOUT; > > + > > + /* Read data */ > > + value = readl(priv->membase + MDIO_CTRL_3_REG); > > + > > + return value; > > +} > > + > > +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum, > > + u16 value) > > +{ > > + struct ipq40xx_mdio_data *priv = bus->priv; > > + unsigned int cmd = 0; > > No need to initialise cmd. > > -- > RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ > FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 3fa33d27eeba..815d52fa6080 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -157,6 +157,13 @@ config MDIO_I2C This is library mode. +config MDIO_IPQ40XX + tristate "Qualcomm IPQ40xx MDIO interface" + depends on HAS_IOMEM && OF + help + This driver supports the MDIO interface found in Qualcomm + IPQ40xx series Soc-s. + config MDIO_IPQ8064 tristate "Qualcomm IPQ8064 MDIO interface support" depends on HAS_IOMEM && OF_MDIO diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 2f5c7093a65b..36aafc6128c4 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o +obj-$(CONFIG_MDIO_IPQ40XX) += mdio-ipq40xx.o obj-$(CONFIG_MDIO_IPQ8064) += mdio-ipq8064.o obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c new file mode 100644 index 000000000000..d8c11c621f20 --- /dev/null +++ b/drivers/net/phy/mdio-ipq40xx.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2020 Sartura Ltd. */ + +#include <linux/delay.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/io.h> +#include <linux/of_address.h> +#include <linux/of_mdio.h> +#include <linux/phy.h> +#include <linux/platform_device.h> + +#define MDIO_CTRL_0_REG 0x40 +#define MDIO_CTRL_1_REG 0x44 +#define MDIO_CTRL_2_REG 0x48 +#define MDIO_CTRL_3_REG 0x4c +#define MDIO_CTRL_4_REG 0x50 +#define MDIO_CTRL_4_ACCESS_BUSY BIT(16) +#define MDIO_CTRL_4_ACCESS_START BIT(8) +#define MDIO_CTRL_4_ACCESS_CODE_READ 0 +#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1 + +#define IPQ40XX_MDIO_RETRY 1000 +#define IPQ40XX_MDIO_DELAY 10 + +struct ipq40xx_mdio_data { + void __iomem *membase; +}; + +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + int i; + + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { + unsigned int busy; + + busy = readl(priv->membase + MDIO_CTRL_4_REG) & + MDIO_CTRL_4_ACCESS_BUSY; + if (!busy) + return 0; + + /* BUSY might take to be cleard by 15~20 times of loop */ + udelay(IPQ40XX_MDIO_DELAY); + } + + dev_err(bus->parent, "MDIO operation timed out\n"); + + return -ETIMEDOUT; +} + +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + int value = 0; + unsigned int cmd = 0; + + /* Reject clause 45 */ + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* issue the phy address and reg */ + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); + + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_READ; + + /* issue read command */ + writel(cmd, priv->membase + MDIO_CTRL_4_REG); + + /* Wait read complete */ + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* Read data */ + value = readl(priv->membase + MDIO_CTRL_3_REG); + + return value; +} + +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum, + u16 value) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + unsigned int cmd = 0; + + /* Reject clause 45 */ + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* issue the phy address and reg */ + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); + + /* issue write data */ + writel(value, priv->membase + MDIO_CTRL_2_REG); + + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_WRITE; + /* issue write command */ + writel(cmd, priv->membase + MDIO_CTRL_4_REG); + + /* Wait write complete */ + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + return 0; +} + +static int ipq40xx_mdio_probe(struct platform_device *pdev) +{ + struct ipq40xx_mdio_data *priv; + struct mii_bus *bus; + int ret; + + bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv)); + if (!bus) + return -ENOMEM; + + priv = bus->priv; + + priv->membase = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->membase)) + return PTR_ERR(priv->membase); + + bus->name = "ipq40xx_mdio"; + bus->read = ipq40xx_mdio_read; + bus->write = ipq40xx_mdio_write; + bus->parent = &pdev->dev; + snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id); + + ret = of_mdiobus_register(bus, pdev->dev.of_node); + if (ret) { + dev_err(&pdev->dev, "Cannot register MDIO bus!\n"); + return ret; + } + + platform_set_drvdata(pdev, bus); + + return 0; +} + +static int ipq40xx_mdio_remove(struct platform_device *pdev) +{ + struct mii_bus *bus = platform_get_drvdata(pdev); + + mdiobus_unregister(bus); + + return 0; +} + +static const struct of_device_id ipq40xx_mdio_dt_ids[] = { + { .compatible = "qcom,ipq40xx-mdio" }, + { } +}; +MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids); + +static struct platform_driver ipq40xx_mdio_driver = { + .probe = ipq40xx_mdio_probe, + .remove = ipq40xx_mdio_remove, + .driver = { + .name = "ipq40xx-mdio", + .of_match_table = ipq40xx_mdio_dt_ids, + }, +}; + +module_platform_driver(ipq40xx_mdio_driver); + +MODULE_DESCRIPTION("IPQ40XX MDIO interface driver"); +MODULE_AUTHOR("Qualcomm Atheros"); +MODULE_LICENSE("Dual BSD/GPL");