| Message ID | 20200414213114.2378-1-will@kernel.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | Relax sanity checking for mismatched AArch32 EL1 | expand |
On 2020-04-15 03:01, Will Deacon wrote: > Hi all, > > For better or worse, there are SoCs in production where some, but not > all of the CPUs, support AArch32 at EL1 and above. Right now, that > results in "SANITY CHECK" warnings during boot and an unconditional > kernel taint. > > This patch series tries to do a bit better: the only time we care about > AArch32 at EL1 is for KVM, so rather than throw our toys out of the > pram, we can instead just disable support for 32-bit guests on these > systems. In the unlikely scenario of a late CPU hotplug being the first > time we notice that AArch32 is not available, then we fail the hotplug > (right now we let the thing come online, which leads to hilarious > results for any pre-existing 32-bit guests). > > Feedback welcome, > > Will > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. For the entire series, Tested-by: saiprakash.ranjan@codeaurora.org -Sai
On 2020-04-16 14:09, Sai Prakash Ranjan wrote: > On 2020-04-15 03:01, Will Deacon wrote: >> Hi all, >> >> For better or worse, there are SoCs in production where some, but not >> all of the CPUs, support AArch32 at EL1 and above. Right now, that >> results in "SANITY CHECK" warnings during boot and an unconditional >> kernel taint. >> >> This patch series tries to do a bit better: the only time we care >> about >> AArch32 at EL1 is for KVM, so rather than throw our toys out of the >> pram, we can instead just disable support for 32-bit guests on these >> systems. In the unlikely scenario of a late CPU hotplug being the >> first >> time we notice that AArch32 is not available, then we fail the hotplug >> (right now we let the thing come online, which leads to hilarious >> results for any pre-existing 32-bit guests). >> >> Feedback welcome, >> >> Will >> > > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. > > For the entire series, > > Tested-by: saiprakash.ranjan@codeaurora.org > Urgh sorry, it should be Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> -Sai
Hi all, For better or worse, there are SoCs in production where some, but not all of the CPUs, support AArch32 at EL1 and above. Right now, that results in "SANITY CHECK" warnings during boot and an unconditional kernel taint. This patch series tries to do a bit better: the only time we care about AArch32 at EL1 is for KVM, so rather than throw our toys out of the pram, we can instead just disable support for 32-bit guests on these systems. In the unlikely scenario of a late CPU hotplug being the first time we notice that AArch32 is not available, then we fail the hotplug (right now we let the thing come online, which leads to hilarious results for any pre-existing 32-bit guests). Feedback welcome, Will Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Doug Anderson <dianders@chromium.org> Cc: kernel-team@android.com --->8 Sai Prakash Ranjan (1): arm64: cpufeature: Relax check for IESB support Will Deacon (7): arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1 arm64: cpufeature: Add CPU capability for AArch32 EL1 support arm64: cpufeature: Remove redundant call to id_aa64pfr0_32bit_el0() arm64: cpufeature: Factor out checking of AArch32 features arm64: cpufeature: Relax AArch32 system checks if EL1 is 64-bit only arm64: cpufeature: Relax checks for AArch32 support at EL[0-2] arm64: cpufeature: Add an overview comment for the cpufeature framework arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 7 + arch/arm64/include/asm/sysreg.h | 18 +++ arch/arm64/kernel/cpufeature.c | 236 +++++++++++++++++++++------- arch/arm64/kvm/reset.c | 12 +- 5 files changed, 206 insertions(+), 70 deletions(-)