Message ID | e7ba4dbd8e9c8aedd6f5db1b3453d9782b7943cd.1579692800.git.saiprakash.ranjan@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | iommu/arm-smmu: Allow client devices to select direct mapping | expand |
On Wed 22 Jan 03:48 PST 2020, Sai Prakash Ranjan wrote: > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > drivers/iommu/arm-smmu-impl.c | 8 +++++--- > drivers/iommu/arm-smmu-qcom.c | 16 +++++++++++++--- > 2 files changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c > index 74d97a886e93..c75b9d957b70 100644 > --- a/drivers/iommu/arm-smmu-impl.c > +++ b/drivers/iommu/arm-smmu-impl.c > @@ -150,6 +150,8 @@ static const struct arm_smmu_impl arm_mmu500_impl = { > > struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > { > + const struct device_node *np = smmu->dev->of_node; > + > /* > * We will inevitably have to combine model-specific implementation > * quirks with platform-specific integration quirks, but everything > @@ -166,11 +168,11 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > break; > } > > - if (of_property_read_bool(smmu->dev->of_node, > - "calxeda,smmu-secure-config-access")) > + if (of_property_read_bool(np, "calxeda,smmu-secure-config-access")) > smmu->impl = &calxeda_impl; > > - if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500")) > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || > + of_device_is_compatible(np, "qcom,sc7180-smmu-500")) > return qcom_smmu_impl_init(smmu); > > return smmu; > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c > index 24c071c1d8b0..64a4ab270ab7 100644 > --- a/drivers/iommu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm-smmu-qcom.c > @@ -15,8 +15,6 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > { > int ret; > > - arm_mmu500_reset(smmu); > - > /* > * To address performance degradation in non-real time clients, > * such as USB and UFS, turn off wait-for-safe on sdm845 based boards, > @@ -30,8 +28,20 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > return ret; > } > > +static int qcom_smmu500_reset(struct arm_smmu_device *smmu) > +{ > + const struct device_node *np = smmu->dev->of_node; > + > + arm_mmu500_reset(smmu); > + > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500")) > + return qcom_sdm845_smmu500_reset(smmu); > + > + return 0; > +} > + > static const struct arm_smmu_impl qcom_smmu_impl = { > - .reset = qcom_sdm845_smmu500_reset, > + .reset = qcom_smmu500_reset, > }; > > struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation
Quoting Sai Prakash Ranjan (2020-01-22 03:48:01) > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
On 2020-01-22 11:48 am, Sai Prakash Ranjan wrote: > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > drivers/iommu/arm-smmu-impl.c | 8 +++++--- > drivers/iommu/arm-smmu-qcom.c | 16 +++++++++++++--- > 2 files changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c > index 74d97a886e93..c75b9d957b70 100644 > --- a/drivers/iommu/arm-smmu-impl.c > +++ b/drivers/iommu/arm-smmu-impl.c > @@ -150,6 +150,8 @@ static const struct arm_smmu_impl arm_mmu500_impl = { > > struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > { > + const struct device_node *np = smmu->dev->of_node; > + > /* > * We will inevitably have to combine model-specific implementation > * quirks with platform-specific integration quirks, but everything > @@ -166,11 +168,11 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > break; > } > > - if (of_property_read_bool(smmu->dev->of_node, > - "calxeda,smmu-secure-config-access")) > + if (of_property_read_bool(np, "calxeda,smmu-secure-config-access")) > smmu->impl = &calxeda_impl; > > - if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500")) > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || > + of_device_is_compatible(np, "qcom,sc7180-smmu-500")) > return qcom_smmu_impl_init(smmu); > > return smmu; > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c > index 24c071c1d8b0..64a4ab270ab7 100644 > --- a/drivers/iommu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm-smmu-qcom.c > @@ -15,8 +15,6 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > { > int ret; > > - arm_mmu500_reset(smmu); > - > /* > * To address performance degradation in non-real time clients, > * such as USB and UFS, turn off wait-for-safe on sdm845 based boards, > @@ -30,8 +28,20 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > return ret; > } > > +static int qcom_smmu500_reset(struct arm_smmu_device *smmu) > +{ > + const struct device_node *np = smmu->dev->of_node; > + > + arm_mmu500_reset(smmu); > + > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500")) > + return qcom_sdm845_smmu500_reset(smmu); > + > + return 0; > +} > + > static const struct arm_smmu_impl qcom_smmu_impl = { > - .reset = qcom_sdm845_smmu500_reset, > + .reset = qcom_smmu500_reset, > }; It might be logical to have a separate SDM845 impl rather than indirecting within the callback itself, but I'm not too concerned either way. For the arm-smmu-impl.c changes, Reviewed-by: Robin Murphy <robin.murphy@arm.com> Thanks, Robin. > > struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) >
diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c index 74d97a886e93..c75b9d957b70 100644 --- a/drivers/iommu/arm-smmu-impl.c +++ b/drivers/iommu/arm-smmu-impl.c @@ -150,6 +150,8 @@ static const struct arm_smmu_impl arm_mmu500_impl = { struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) { + const struct device_node *np = smmu->dev->of_node; + /* * We will inevitably have to combine model-specific implementation * quirks with platform-specific integration quirks, but everything @@ -166,11 +168,11 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) break; } - if (of_property_read_bool(smmu->dev->of_node, - "calxeda,smmu-secure-config-access")) + if (of_property_read_bool(np, "calxeda,smmu-secure-config-access")) smmu->impl = &calxeda_impl; - if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500")) + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || + of_device_is_compatible(np, "qcom,sc7180-smmu-500")) return qcom_smmu_impl_init(smmu); return smmu; diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c index 24c071c1d8b0..64a4ab270ab7 100644 --- a/drivers/iommu/arm-smmu-qcom.c +++ b/drivers/iommu/arm-smmu-qcom.c @@ -15,8 +15,6 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) { int ret; - arm_mmu500_reset(smmu); - /* * To address performance degradation in non-real time clients, * such as USB and UFS, turn off wait-for-safe on sdm845 based boards, @@ -30,8 +28,20 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) return ret; } +static int qcom_smmu500_reset(struct arm_smmu_device *smmu) +{ + const struct device_node *np = smmu->dev->of_node; + + arm_mmu500_reset(smmu); + + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500")) + return qcom_sdm845_smmu500_reset(smmu); + + return 0; +} + static const struct arm_smmu_impl qcom_smmu_impl = { - .reset = qcom_sdm845_smmu500_reset, + .reset = qcom_smmu500_reset, }; struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
Currently the QCOM specific smmu reset implementation is very specific to SDM845 SoC and has a wait-for-safe logic which may not be required for other SoCs. So move the SDM845 specific logic to its specific reset function. Also add SC7180 SMMU compatible for calling into QCOM specific implementation. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- drivers/iommu/arm-smmu-impl.c | 8 +++++--- drivers/iommu/arm-smmu-qcom.c | 16 +++++++++++++--- 2 files changed, 18 insertions(+), 6 deletions(-)