| Message ID | 20200421234127.27965-5-jonathan@marek.ca (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/9] drm/msm: add msm_gem_get_and_pin_iova_range | expand |
On Tue, Apr 21, 2020 at 07:41:22PM -0400, Jonathan Marek wrote: > Add Adreno 640 and 650 GPU info to the gpulist. > Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 24 ++++++++++++++++++++++ > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 10 +++++++++ > 3 files changed, 35 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > index cb3a6e597d76..1156f72532a4 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > @@ -189,6 +189,30 @@ static const struct adreno_info gpulist[] = { > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > .init = a6xx_gpu_init, > .zapfw = "a630_zap.mdt", > + }, { > + .rev = ADRENO_REV(6, 4, 0, ANY_ID), > + .revn = 640, > + .name = "A640", > + .fw = { > + [ADRENO_FW_SQE] = "a630_sqe.fw", > + [ADRENO_FW_GMU] = "a640_gmu.bin", > + }, > + .gmem = SZ_1M, > + .inactive_period = DRM_MSM_INACTIVE_PERIOD, > + .init = a6xx_gpu_init, > + .zapfw = "a640_zap.mdt", > + }, { > + .rev = ADRENO_REV(6, 5, 0, ANY_ID), > + .revn = 650, > + .name = "A650", > + .fw = { > + [ADRENO_FW_SQE] = "a650_sqe.fw", > + [ADRENO_FW_GMU] = "a650_gmu.bin", > + }, > + .gmem = SZ_1M + SZ_128K, > + .inactive_period = DRM_MSM_INACTIVE_PERIOD, > + .init = a6xx_gpu_init, > + .zapfw = "a650_zap.mdt", > }, > }; > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index 1d5c43c22269..a7647eaacc7a 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -197,7 +197,7 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) > *value = adreno_gpu->gmem; > return 0; > case MSM_PARAM_GMEM_BASE: > - *value = 0x100000; > + *value = !adreno_is_a650(adreno_gpu) ? 0x100000 : 0; This will likely be 0 from here on out. This is okay for now, but we might need to consider adding the gmem base to the GPU list to avoid some ugly conditionals. > return 0; > case MSM_PARAM_CHIP_ID: > *value = adreno_gpu->rev.patchid | > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index 9ff4e550e7bd..88ae1b2813ef 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -237,6 +237,16 @@ static inline int adreno_is_a630(struct adreno_gpu *gpu) > return gpu->revn == 630; > } > > +static inline int adreno_is_a640(struct adreno_gpu *gpu) > +{ > + return gpu->revn == 640; > +} > + > +static inline int adreno_is_a650(struct adreno_gpu *gpu) > +{ > + return gpu->revn == 650; > +} > + > int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); > const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu, > const char *fwname); > -- > 2.26.1 >
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index cb3a6e597d76..1156f72532a4 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -189,6 +189,30 @@ static const struct adreno_info gpulist[] = { .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a6xx_gpu_init, .zapfw = "a630_zap.mdt", + }, { + .rev = ADRENO_REV(6, 4, 0, ANY_ID), + .revn = 640, + .name = "A640", + .fw = { + [ADRENO_FW_SQE] = "a630_sqe.fw", + [ADRENO_FW_GMU] = "a640_gmu.bin", + }, + .gmem = SZ_1M, + .inactive_period = DRM_MSM_INACTIVE_PERIOD, + .init = a6xx_gpu_init, + .zapfw = "a640_zap.mdt", + }, { + .rev = ADRENO_REV(6, 5, 0, ANY_ID), + .revn = 650, + .name = "A650", + .fw = { + [ADRENO_FW_SQE] = "a650_sqe.fw", + [ADRENO_FW_GMU] = "a650_gmu.bin", + }, + .gmem = SZ_1M + SZ_128K, + .inactive_period = DRM_MSM_INACTIVE_PERIOD, + .init = a6xx_gpu_init, + .zapfw = "a650_zap.mdt", }, }; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 1d5c43c22269..a7647eaacc7a 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -197,7 +197,7 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) *value = adreno_gpu->gmem; return 0; case MSM_PARAM_GMEM_BASE: - *value = 0x100000; + *value = !adreno_is_a650(adreno_gpu) ? 0x100000 : 0; return 0; case MSM_PARAM_CHIP_ID: *value = adreno_gpu->rev.patchid | diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 9ff4e550e7bd..88ae1b2813ef 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -237,6 +237,16 @@ static inline int adreno_is_a630(struct adreno_gpu *gpu) return gpu->revn == 630; } +static inline int adreno_is_a640(struct adreno_gpu *gpu) +{ + return gpu->revn == 640; +} + +static inline int adreno_is_a650(struct adreno_gpu *gpu) +{ + return gpu->revn == 650; +} + int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname);
Add Adreno 640 and 650 GPU info to the gpulist. Signed-off-by: Jonathan Marek <jonathan@marek.ca> --- drivers/gpu/drm/msm/adreno/adreno_device.c | 24 ++++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 10 +++++++++ 3 files changed, 35 insertions(+), 1 deletion(-)