diff mbox series

[v2,06/10] net: cadence_gem: Add support for jumbo frames

Message ID 1588601168-27576-7-git-send-email-sai.pavan.boddu@xilinx.com (mailing list archive)
State New, archived
Headers show
Series Cadence GEM Fixes | expand

Commit Message

Sai Pavan Boddu May 4, 2020, 2:06 p.m. UTC
Jumbo frames of size 10240 bytes is added.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
 hw/net/cadence_gem.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Edgar E. Iglesias May 4, 2020, 3:23 p.m. UTC | #1
On Mon, May 04, 2020 at 07:36:04PM +0530, Sai Pavan Boddu wrote:
> Jumbo frames of size 10240 bytes is added.

Hi Sai,

I think we should make this a property since it's a design
configuration option (10240 being the default).

> 
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> ---
>  hw/net/cadence_gem.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index beb38ec..848be3f 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -313,6 +313,7 @@
>  #define DESC_1_RX_EOF 0x00008000
>  
>  #define GEM_MODID_VALUE 0x00020118
> +#define MAX_TX_FRAME_SIZE 10240

This applies to RX aswell, better to rename to MAX_FRAME_SIZE.

>  
>  static inline uint64_t tx_desc_get_buffer(CadenceGEMState *s, uint32_t *desc)
>  {
> @@ -1143,7 +1144,7 @@ static void gem_transmit(CadenceGEMState *s)
>  {
>      uint32_t desc[DESC_MAX_NUM_WORDS];
>      hwaddr packet_desc_addr;
> -    uint8_t     tx_packet[2048];
> +    uint8_t     tx_packet[MAX_TX_FRAME_SIZE];

rxbuf in gem_receive needs the same.
We also may want to consider moving these buffers from the stack
to CadenceGEMState *s.


>      uint8_t     *p;
>      unsigned    total_bytes;
>      int q = 0;
> @@ -1344,7 +1345,7 @@ static void gem_reset(DeviceState *d)
>      s->regs[GEM_RXPARTIALSF] = 0x000003ff;
>      s->regs[GEM_MODID] = s->revision;
>      s->regs[GEM_DESCONF] = 0x02500111;
> -    s->regs[GEM_DESCONF2] = 0x2ab13fff;
> +    s->regs[GEM_DESCONF2] = 0x2ab12800;


We need to add and populate the following register:
#define GEM_JUMBO_MAX_LEN   (0x00000048/4) /* Maximum Jumbo Frame Size */


>      s->regs[GEM_DESCONF5] = 0x002f2045;
>      s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;
>  
> -- 
> 2.7.4
>
diff mbox series

Patch

diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index beb38ec..848be3f 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -313,6 +313,7 @@ 
 #define DESC_1_RX_EOF 0x00008000
 
 #define GEM_MODID_VALUE 0x00020118
+#define MAX_TX_FRAME_SIZE 10240
 
 static inline uint64_t tx_desc_get_buffer(CadenceGEMState *s, uint32_t *desc)
 {
@@ -1143,7 +1144,7 @@  static void gem_transmit(CadenceGEMState *s)
 {
     uint32_t desc[DESC_MAX_NUM_WORDS];
     hwaddr packet_desc_addr;
-    uint8_t     tx_packet[2048];
+    uint8_t     tx_packet[MAX_TX_FRAME_SIZE];
     uint8_t     *p;
     unsigned    total_bytes;
     int q = 0;
@@ -1344,7 +1345,7 @@  static void gem_reset(DeviceState *d)
     s->regs[GEM_RXPARTIALSF] = 0x000003ff;
     s->regs[GEM_MODID] = s->revision;
     s->regs[GEM_DESCONF] = 0x02500111;
-    s->regs[GEM_DESCONF2] = 0x2ab13fff;
+    s->regs[GEM_DESCONF2] = 0x2ab12800;
     s->regs[GEM_DESCONF5] = 0x002f2045;
     s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;