Message ID | 1588500367-1056-3-git-send-email-chenhc@lemote.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: MIPS: Add Loongson-3 support (Host Side) | expand |
нед, 3. мај 2020. у 12:07 Huacai Chen <chenhc@lemote.com> је написао/ла: > > From: Xing Li <lixing@loongson.cn> > > If a CPU support more than 32bit vmbits (which is true for 64bit CPUs), > VPN2_MASK set to fixed 0xffffe000 will lead to a wrong EntryHi in some > functions such as _kvm_mips_host_tlb_inv(). > > The cpu_vmbits definition of 32bit CPU in cpu-features.h is 31, so we > still use the old definition. > > Cc: stable@vger.kernel.org > Signed-off-by: Xing Li <lixing@loongson.cn> > [Huacai: Improve commit messages] > Signed-off-by: Huacai Chen <chenhc@lemote.com> > --- > arch/mips/include/asm/kvm_host.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h > index a01cee9..caa2b936 100644 > --- a/arch/mips/include/asm/kvm_host.h > +++ b/arch/mips/include/asm/kvm_host.h > @@ -274,7 +274,11 @@ enum emulation_result { > #define MIPS3_PG_SHIFT 6 > #define MIPS3_PG_FRAME 0x3fffffc0 > > +#if defined(CONFIG_64BIT) > +#define VPN2_MASK GENMASK(cpu_vmbits - 1, 13) > +#else > #define VPN2_MASK 0xffffe000 > +#endif > #define KVM_ENTRYHI_ASID cpu_asid_mask(&boot_cpu_data) > #define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G) > #define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK) > -- > 2.7.0 > Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index a01cee9..caa2b936 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -274,7 +274,11 @@ enum emulation_result { #define MIPS3_PG_SHIFT 6 #define MIPS3_PG_FRAME 0x3fffffc0 +#if defined(CONFIG_64BIT) +#define VPN2_MASK GENMASK(cpu_vmbits - 1, 13) +#else #define VPN2_MASK 0xffffe000 +#endif #define KVM_ENTRYHI_ASID cpu_asid_mask(&boot_cpu_data) #define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G) #define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK)