| Message ID | 20200424044311.2155917-2-vkoul@kernel.org (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | [1/2] clk: qcom: gcc: Add GPU and NPU clocks for SM8150 | expand |
Quoting Vinod Koul (2020-04-23 21:43:11) > Add the missing ufs card and ufs phy clocks for SM8150. They were missed > in earlier addition of clock driver. > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++ > 1 file changed, 84 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c > index 5c3dc34c955e..4354620fa12d 100644 > --- a/drivers/clk/qcom/gcc-sm8150.c > +++ b/drivers/clk/qcom/gcc-sm8150.c > @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = { > }, > }; > > +/* external clocks so add BRANCH_HALT_SKIP */ > +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { > + .halt_check = BRANCH_HALT_SKIP, > + .clkr = { > + .enable_reg = 0x7501c, > + .enable_mask = BIT(0), > + .hw.init = &(struct clk_init_data){ > + .name = "gcc_ufs_card_rx_symbol_0_clk", Any reason to not use .fw_name? > + .ops = &clk_branch2_ops, > + }, > + }, > +}; > + > +/* external clocks so add BRANCH_HALT_SKIP */ > +static struct clk_branch gcc_ufs_card_rx_symbol_1_clk = { > + .halt_check = BRANCH_HALT_SKIP, > + .clkr = { > + .enable_reg = 0x750ac, > + .enable_mask = BIT(0),
On 25-04-20, 12:11, Stephen Boyd wrote: > Quoting Vinod Koul (2020-04-23 21:43:11) > > Add the missing ufs card and ufs phy clocks for SM8150. They were missed > > in earlier addition of clock driver. > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > --- > > drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 84 insertions(+) > > > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c > > index 5c3dc34c955e..4354620fa12d 100644 > > --- a/drivers/clk/qcom/gcc-sm8150.c > > +++ b/drivers/clk/qcom/gcc-sm8150.c > > @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = { > > }, > > }; > > > > +/* external clocks so add BRANCH_HALT_SKIP */ > > +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { > > + .halt_check = BRANCH_HALT_SKIP, > > + .clkr = { > > + .enable_reg = 0x7501c, > > + .enable_mask = BIT(0), > > + .hw.init = &(struct clk_init_data){ > > + .name = "gcc_ufs_card_rx_symbol_0_clk", > > Any reason to not use .fw_name? Did i understand it correct that you would like these to have .fw_name for parent? Should we start adding these clocks in DT description?
Quoting Vinod Koul (2020-04-26 21:55:34) > On 25-04-20, 12:11, Stephen Boyd wrote: > > Quoting Vinod Koul (2020-04-23 21:43:11) > > > Add the missing ufs card and ufs phy clocks for SM8150. They were missed > > > in earlier addition of clock driver. > > > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > > --- > > > drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++ > > > 1 file changed, 84 insertions(+) > > > > > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c > > > index 5c3dc34c955e..4354620fa12d 100644 > > > --- a/drivers/clk/qcom/gcc-sm8150.c > > > +++ b/drivers/clk/qcom/gcc-sm8150.c > > > @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = { > > > }, > > > }; > > > > > > +/* external clocks so add BRANCH_HALT_SKIP */ > > > +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { > > > + .halt_check = BRANCH_HALT_SKIP, > > > + .clkr = { > > > + .enable_reg = 0x7501c, > > > + .enable_mask = BIT(0), > > > + .hw.init = &(struct clk_init_data){ > > > + .name = "gcc_ufs_card_rx_symbol_0_clk", > > > > Any reason to not use .fw_name? > > Did i understand it correct that you would like these to have .fw_name > for parent? Should we start adding these clocks in DT description? > Sorry I misread the patch. This isn't a parent name description so .name is correct here.
On 12-05-20, 18:25, Stephen Boyd wrote: > Quoting Vinod Koul (2020-04-26 21:55:34) > > On 25-04-20, 12:11, Stephen Boyd wrote: > > > Quoting Vinod Koul (2020-04-23 21:43:11) > > > > Add the missing ufs card and ufs phy clocks for SM8150. They were missed > > > > in earlier addition of clock driver. > > > > > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > > > --- > > > > drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++ > > > > 1 file changed, 84 insertions(+) > > > > > > > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c > > > > index 5c3dc34c955e..4354620fa12d 100644 > > > > --- a/drivers/clk/qcom/gcc-sm8150.c > > > > +++ b/drivers/clk/qcom/gcc-sm8150.c > > > > @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = { > > > > }, > > > > }; > > > > > > > > +/* external clocks so add BRANCH_HALT_SKIP */ > > > > +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { > > > > + .halt_check = BRANCH_HALT_SKIP, > > > > + .clkr = { > > > > + .enable_reg = 0x7501c, > > > > + .enable_mask = BIT(0), > > > > + .hw.init = &(struct clk_init_data){ > > > > + .name = "gcc_ufs_card_rx_symbol_0_clk", > > > > > > Any reason to not use .fw_name? > > > > Did i understand it correct that you would like these to have .fw_name > > for parent? Should we start adding these clocks in DT description? > > Sorry I misread the patch. This isn't a parent name description so .name > is correct here. No worries, I will add fixes and send the update Thanks
diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 5c3dc34c955e..4354620fa12d 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = { }, }; +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x7501c, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_rx_symbol_0_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_card_rx_symbol_1_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x750ac, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_rx_symbol_1_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_card_tx_symbol_0_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x75018, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_card_tx_symbol_0_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_ufs_card_unipro_core_clk = { .halt_reg = 0x75058, .halt_check = BRANCH_HALT, @@ -3061,6 +3100,45 @@ static struct clk_branch gcc_ufs_phy_phy_aux_hw_ctl_clk = { }, }; +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x7701c, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_rx_symbol_0_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x770ac, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_rx_symbol_1_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +/* external clocks so add BRANCH_HALT_SKIP */ +static struct clk_branch gcc_ufs_phy_tx_symbol_0_clk = { + .halt_check = BRANCH_HALT_SKIP, + .clkr = { + .enable_reg = 0x77018, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_ufs_phy_tx_symbol_0_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_ufs_phy_unipro_core_clk = { .halt_reg = 0x77058, .halt_check = BRANCH_HALT, @@ -3557,6 +3635,9 @@ static struct clk_regmap *gcc_sm8150_clocks[] = { [GCC_UFS_CARD_PHY_AUX_CLK_SRC] = &gcc_ufs_card_phy_aux_clk_src.clkr, [GCC_UFS_CARD_PHY_AUX_HW_CTL_CLK] = &gcc_ufs_card_phy_aux_hw_ctl_clk.clkr, + [GCC_UFS_CARD_RX_SYMBOL_0_CLK] = &gcc_ufs_card_rx_symbol_0_clk.clkr, + [GCC_UFS_CARD_RX_SYMBOL_1_CLK] = &gcc_ufs_card_rx_symbol_1_clk.clkr, + [GCC_UFS_CARD_TX_SYMBOL_0_CLK] = &gcc_ufs_card_tx_symbol_0_clk.clkr, [GCC_UFS_CARD_UNIPRO_CORE_CLK] = &gcc_ufs_card_unipro_core_clk.clkr, [GCC_UFS_CARD_UNIPRO_CORE_CLK_SRC] = &gcc_ufs_card_unipro_core_clk_src.clkr, @@ -3574,6 +3655,9 @@ static struct clk_regmap *gcc_sm8150_clocks[] = { [GCC_UFS_PHY_PHY_AUX_CLK] = &gcc_ufs_phy_phy_aux_clk.clkr, [GCC_UFS_PHY_PHY_AUX_CLK_SRC] = &gcc_ufs_phy_phy_aux_clk_src.clkr, [GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK] = &gcc_ufs_phy_phy_aux_hw_ctl_clk.clkr, + [GCC_UFS_PHY_RX_SYMBOL_0_CLK] = &gcc_ufs_phy_rx_symbol_0_clk.clkr, + [GCC_UFS_PHY_RX_SYMBOL_1_CLK] = &gcc_ufs_phy_rx_symbol_1_clk.clkr, + [GCC_UFS_PHY_TX_SYMBOL_0_CLK] = &gcc_ufs_phy_tx_symbol_0_clk.clkr, [GCC_UFS_PHY_UNIPRO_CORE_CLK] = &gcc_ufs_phy_unipro_core_clk.clkr, [GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC] = &gcc_ufs_phy_unipro_core_clk_src.clkr,
Add the missing ufs card and ufs phy clocks for SM8150. They were missed in earlier addition of clock driver. Signed-off-by: Vinod Koul <vkoul@kernel.org> --- drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+)