| Message ID | f998fe6c-c586-17cb-9343-30460ce0bf9d@cogentembedded.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Renesas RPC-IF support | expand |
Hi Sergei, On Mon, May 18, 2020 at 10:33 PM Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or > HyperFlash connected to the SoC to be accessed via the external address > space read mode or the manual mode. > > Document the device tree bindings for the Renesas RPC-IF found in the R-Car > gen3 SoCs. > > Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Thanks for your patch! > --- /dev/null > +++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml > @@ -0,0 +1,88 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas Reduced Pin Count Interface (RPC-IF) > + > +maintainers: > + - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > + > +description: | > + Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to > + be accessed via the external address space read mode or the manual mode. > + > + The flash chip itself should be represented by a subnode of the RPC-IF node. > + The flash interface is selected based on the "compatible" property of this > + subnode: > + - if it contains "jedec,spi-nor", then SPI is used; > + - if it contains "cfi-flash", then HyperFlash is used. > + > +allOf: > + - $ref: "/schemas/spi/spi-controller.yaml#" > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,r8a77980-rpc-if Usually we add a comment with the SoC name, e.g. "# R-Car V3H" > + - renesas,r8a77995-rpc-if > + - enum: > + - renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device No need for an enum, just use "- const: renesas,rcar-gen3-rpc-if". > +examples: > + - | > + #include <dt-bindings/clock/renesas-cpg-mssr.h> > + #include <dt-bindings/power/r8a77995-sysc.h> > + > + spi@ee200000 { > + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; > + reg = <0 0xee200000 0 0x200>, > + <0 0x08000000 0 0x4000000>, > + <0 0xee208000 0 0x100>; Examples are built with #{address,size}-cells = <1>, so please drop the zeroes. Gr{oetje,eeting}s, Geert
On Mon, 18 May 2020 23:33:15 +0300, Sergei Shtylyov wrote: > Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or > HyperFlash connected to the SoC to be accessed via the external address > space read mode or the manual mode. > > Document the device tree bindings for the Renesas RPC-IF found in the R-Car > gen3 SoCs. > > Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > Changes in version 3: > - fixed up the whitespace and added hyphens in the "compatible" prop text, also > removed the comments; > - specified the subnode name as "flash", and used "enum" in the subnode text; > - fixed up the SPDX-License-Identifier: tag. > > Changes in version 2: > - rewrote the bindings in YAML. > > Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++ > 1 file changed, 88 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: patternProperties:flash@[0-9a-f]+$:properties:compatible: [{'enum': ['cfi-flash', 'jedec,spi-nor']}] is not of type 'object', 'boolean' Documentation/devicetree/bindings/Makefile:12: recipe for target 'Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts' failed make[1]: *** [Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts] Error 1 make[1]: *** Waiting for unfinished jobs.... Makefile:1300: recipe for target 'dt_binding_check' failed make: *** [dt_binding_check] Error 2 See https://patchwork.ozlabs.org/patch/1292811 If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date: pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade Please check and re-submit.
Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml =================================================================== --- /dev/null +++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Reduced Pin Count Interface (RPC-IF) + +maintainers: + - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> + +description: | + Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to + be accessed via the external address space read mode or the manual mode. + + The flash chip itself should be represented by a subnode of the RPC-IF node. + The flash interface is selected based on the "compatible" property of this + subnode: + - if it contains "jedec,spi-nor", then SPI is used; + - if it contains "cfi-flash", then HyperFlash is used. + +allOf: + - $ref: "/schemas/spi/spi-controller.yaml#" + +properties: + compatible: + items: + - enum: + - renesas,r8a77980-rpc-if + - renesas,r8a77995-rpc-if + - enum: + - renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device + + reg: + items: + - description: RPC-IF registers + - description: direct mapping read mode area + - description: write buffer area + + reg-names: + items: + - const: regs + - const: dirmap + - const: wbuf + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "flash@[0-9a-f]+$": + type: object + properties: + compatible: + - enum: + - cfi-flash + - jedec,spi-nor + +examples: + - | + #include <dt-bindings/clock/renesas-cpg-mssr.h> + #include <dt-bindings/power/r8a77995-sysc.h> + + spi@ee200000 { + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };
Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC to be accessed via the external address space read mode or the manual mode. Document the device tree bindings for the Renesas RPC-IF found in the R-Car gen3 SoCs. Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- Changes in version 3: - fixed up the whitespace and added hyphens in the "compatible" prop text, also removed the comments; - specified the subnode name as "flash", and used "enum" in the subnode text; - fixed up the SPDX-License-Identifier: tag. Changes in version 2: - rewrote the bindings in YAML. Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++ 1 file changed, 88 insertions(+)