| Message ID | 20200521204818.25436-1-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| Headers | show |
| Series | clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support | expand |
On 21/05/2020 22:48, Serge Semin wrote: > As for all Baikal-T1 SoC related patchsets, which need this, we replaced > the DW APB Timer legacy plain text-based dt-binding file with DT schema. > Similarly the MIPS GIC bindings file is also converted to DT schema seeing > it also defines the MIPS GIC Timer binding. > > Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a > functionality of two another timers: embedded into the MIPS GIC timer and > three external DW timers available over APB bus. But we can't use them > before the corresponding drivers are properly fixed. First of all DW APB > Timer shouldn't be bound to a single CPU, since as being accessible over > APB they are external with respect to all possible CPUs. Secondly there > might be more than just two DW APB Timers in the system (Baikal-T1 has > three of them), so permit the driver to use one of them as a clocksource > and the rest - for clockevents. Thirdly it's possible to use MIPS GIC > timer as a clocksource so register it in the corresponding subsystem > (the patch has been found in the Paul Burton MIPS repo so I left the > original Signed-off-by attribute). Finally in the same way as r4k timer > the MIPS GIC timer should be used with care when CPUFREQ config is enabled > since in case of CM2 the timer counting depends on the CPU reference clock > frequency while the clocksource subsystem currently doesn't support the > timers with non-stable clock. > > This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: > base-commit: 0e698dfa2822 ("Linux 5.7-rc4") > tag: v5.7-rc4 Applied patch 1,2,4,5,6,7,8 Thanks! -- Daniel
On Fri, May 22, 2020 at 05:28:42PM +0200, Daniel Lezcano wrote: > On 21/05/2020 22:48, Serge Semin wrote: > > As for all Baikal-T1 SoC related patchsets, which need this, we replaced > > the DW APB Timer legacy plain text-based dt-binding file with DT schema. > > Similarly the MIPS GIC bindings file is also converted to DT schema seeing > > it also defines the MIPS GIC Timer binding. > > > > Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a > > functionality of two another timers: embedded into the MIPS GIC timer and > > three external DW timers available over APB bus. But we can't use them > > before the corresponding drivers are properly fixed. First of all DW APB > > Timer shouldn't be bound to a single CPU, since as being accessible over > > APB they are external with respect to all possible CPUs. Secondly there > > might be more than just two DW APB Timers in the system (Baikal-T1 has > > three of them), so permit the driver to use one of them as a clocksource > > and the rest - for clockevents. Thirdly it's possible to use MIPS GIC > > timer as a clocksource so register it in the corresponding subsystem > > (the patch has been found in the Paul Burton MIPS repo so I left the > > original Signed-off-by attribute). Finally in the same way as r4k timer > > the MIPS GIC timer should be used with care when CPUFREQ config is enabled > > since in case of CM2 the timer counting depends on the CPU reference clock > > frequency while the clocksource subsystem currently doesn't support the > > timers with non-stable clock. > > > > This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: > > base-commit: 0e698dfa2822 ("Linux 5.7-rc4") > > tag: v5.7-rc4 > > Applied patch 1,2,4,5,6,7,8 > > Thanks! Great! Thanks. Am I right to expect the series in: git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git at the branch timers/core? -Sergey > > -- Daniel > > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
On 22/05/2020 17:41, Serge Semin wrote: > On Fri, May 22, 2020 at 05:28:42PM +0200, Daniel Lezcano wrote: >> On 21/05/2020 22:48, Serge Semin wrote: >>> As for all Baikal-T1 SoC related patchsets, which need this, we replaced >>> the DW APB Timer legacy plain text-based dt-binding file with DT schema. >>> Similarly the MIPS GIC bindings file is also converted to DT schema seeing >>> it also defines the MIPS GIC Timer binding. >>> >>> Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a >>> functionality of two another timers: embedded into the MIPS GIC timer and >>> three external DW timers available over APB bus. But we can't use them >>> before the corresponding drivers are properly fixed. First of all DW APB >>> Timer shouldn't be bound to a single CPU, since as being accessible over >>> APB they are external with respect to all possible CPUs. Secondly there >>> might be more than just two DW APB Timers in the system (Baikal-T1 has >>> three of them), so permit the driver to use one of them as a clocksource >>> and the rest - for clockevents. Thirdly it's possible to use MIPS GIC >>> timer as a clocksource so register it in the corresponding subsystem >>> (the patch has been found in the Paul Burton MIPS repo so I left the >>> original Signed-off-by attribute). Finally in the same way as r4k timer >>> the MIPS GIC timer should be used with care when CPUFREQ config is enabled >>> since in case of CM2 the timer counting depends on the CPU reference clock >>> frequency while the clocksource subsystem currently doesn't support the >>> timers with non-stable clock. >>> >>> This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: >>> base-commit: 0e698dfa2822 ("Linux 5.7-rc4") >>> tag: v5.7-rc4 >> >> Applied patch 1,2,4,5,6,7,8 >> >> Thanks! > > Great! Thanks. Am I right to expect the series in: git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > at the branch timers/core? The series first goes to: https://git.linaro.org/people/daniel.lezcano/linux.git/log/?h=timers/drivers/next , then I send the PR to Thomas, who send in turn a PR at the merge windows to Linus for the entire tip tree.
On Fri, May 22, 2020 at 05:44:55PM +0200, Daniel Lezcano wrote: > On 22/05/2020 17:41, Serge Semin wrote: > > On Fri, May 22, 2020 at 05:28:42PM +0200, Daniel Lezcano wrote: > >> On 21/05/2020 22:48, Serge Semin wrote: > >>> As for all Baikal-T1 SoC related patchsets, which need this, we replaced > >>> the DW APB Timer legacy plain text-based dt-binding file with DT schema. > >>> Similarly the MIPS GIC bindings file is also converted to DT schema seeing > >>> it also defines the MIPS GIC Timer binding. > >>> > >>> Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a > >>> functionality of two another timers: embedded into the MIPS GIC timer and > >>> three external DW timers available over APB bus. But we can't use them > >>> before the corresponding drivers are properly fixed. First of all DW APB > >>> Timer shouldn't be bound to a single CPU, since as being accessible over > >>> APB they are external with respect to all possible CPUs. Secondly there > >>> might be more than just two DW APB Timers in the system (Baikal-T1 has > >>> three of them), so permit the driver to use one of them as a clocksource > >>> and the rest - for clockevents. Thirdly it's possible to use MIPS GIC > >>> timer as a clocksource so register it in the corresponding subsystem > >>> (the patch has been found in the Paul Burton MIPS repo so I left the > >>> original Signed-off-by attribute). Finally in the same way as r4k timer > >>> the MIPS GIC timer should be used with care when CPUFREQ config is enabled > >>> since in case of CM2 the timer counting depends on the CPU reference clock > >>> frequency while the clocksource subsystem currently doesn't support the > >>> timers with non-stable clock. > >>> > >>> This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: > >>> base-commit: 0e698dfa2822 ("Linux 5.7-rc4") > >>> tag: v5.7-rc4 > >> > >> Applied patch 1,2,4,5,6,7,8 > >> > >> Thanks! > > > > Great! Thanks. Am I right to expect the series in: git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > > at the branch timers/core? > > The series first goes to: > > https://git.linaro.org/people/daniel.lezcano/linux.git/log/?h=timers/drivers/next > > , then I send the PR to Thomas, who send in turn a PR at the merge > windows to Linus for the entire tip tree. Ok. Thanks for clarification. -Sergey > > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
As for all Baikal-T1 SoC related patchsets, which need this, we replaced the DW APB Timer legacy plain text-based dt-binding file with DT schema. Similarly the MIPS GIC bindings file is also converted to DT schema seeing it also defines the MIPS GIC Timer binding. Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a functionality of two another timers: embedded into the MIPS GIC timer and three external DW timers available over APB bus. But we can't use them before the corresponding drivers are properly fixed. First of all DW APB Timer shouldn't be bound to a single CPU, since as being accessible over APB they are external with respect to all possible CPUs. Secondly there might be more than just two DW APB Timers in the system (Baikal-T1 has three of them), so permit the driver to use one of them as a clocksource and the rest - for clockevents. Thirdly it's possible to use MIPS GIC timer as a clocksource so register it in the corresponding subsystem (the patch has been found in the Paul Burton MIPS repo so I left the original Signed-off-by attribute). Finally in the same way as r4k timer the MIPS GIC timer should be used with care when CPUFREQ config is enabled since in case of CM2 the timer counting depends on the CPU reference clock frequency while the clocksource subsystem currently doesn't support the timers with non-stable clock. This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: base-commit: 0e698dfa2822 ("Linux 5.7-rc4") tag: v5.7-rc4 Changelog v2: - Fix the SoB tags. - Our corporate email server doesn't change Message-Id anymore, so the patchset is resubmitted being in the cover-letter-threaded format. - Convert the "snps,dw-apb-timer" binding to DT schema in a dedicated patch. - Convert the "mti,gic" binding to DT schema in a dedicated patch. Link: https://lore.kernel.org/linux-rtc/20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru Changelog v3: - Make the MIPS GIC timer sub-node name not having a unit-address number. - Discard allOf: [ $ref: /schemas/interrupt-controller.yaml# ] from MIPS GIC bindings. - Add patch moving the "snps,dw-apb-timer" binding file to the directory with timers binding files. Link: https://lore.kernel.org/linux-rtc/20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru Changelog v4: - Mark clocksource as unstable instead of lowering its rating. - Move conditional sched clocks registration to the Paul' patch. - Add Thomas Gleixner to the patchset To-list to draw his attention to the patch "dt-bindings: interrupt-controller: Convert mti,gic to DT schema". Link: https://lore.kernel.org/linux-rtc/20200521005321.12129-1-Sergey.Semin@baikalelectronics.ru/ Changelog v5: - Fix mistakenly added "git_" prefix. Obviously it was supposed to be gic_. - Add new patch "clocksource: dw_apb_timer: Affiliate of-based timer with any CPU" Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru> Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru> Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru> Cc: Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Paul Burton (1): clocksource: mips-gic-timer: Register as sched_clock Serge Semin (7): dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc dt-bindings: interrupt-controller: Convert mti,gic to DT schema clocksource: dw_apb_timer: Make CPU-affiliation being optional clocksource: dw_apb_timer: Affiliate of-based timer with any CPU clocksource: dw_apb_timer_of: Fix missing clockevent timers clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes .../interrupt-controller/mips-gic.txt | 67 -------- .../interrupt-controller/mti,gic.yaml | 148 ++++++++++++++++++ .../devicetree/bindings/rtc/dw-apb.txt | 32 ---- .../bindings/timer/snps,dw-apb-timer.yaml | 88 +++++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/dw_apb_timer.c | 5 +- drivers/clocksource/dw_apb_timer_of.c | 8 +- drivers/clocksource/mips-gic-timer.c | 50 +++++- 8 files changed, 288 insertions(+), 111 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml delete mode 100644 Documentation/devicetree/bindings/rtc/dw-apb.txt create mode 100644 Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml