| Message ID | 1590375160-6997-3-git-send-email-maobibo@loongson.cn (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v6,1/4] MIPS: Do not flush tlb page when updating PTE entry | expand |
On Mon, 25 May 2020 10:52:39 +0800 Bibo Mao <maobibo@loongson.cn> wrote: > Here add pte_sw_mkyoung function to make page readable on MIPS > platform during page fault handling. This patch improves page > fault latency about 10% on my MIPS machine with lmbench > lat_pagefault case. > > It is noop function on other arches, there is no negative > influence on those architectures. Acked-by: Andrew Morton <akpm@linux-foundation.org> Should I take these, or would the mips tree be preferred? I'm OK either way, but probably the MIPS tree would be better?
On 05/26/2020 05:44 AM, Andrew Morton wrote: > On Mon, 25 May 2020 10:52:39 +0800 Bibo Mao <maobibo@loongson.cn> wrote: > >> Here add pte_sw_mkyoung function to make page readable on MIPS >> platform during page fault handling. This patch improves page >> fault latency about 10% on my MIPS machine with lmbench >> lat_pagefault case. >> >> It is noop function on other arches, there is no negative >> influence on those architectures. > > Acked-by: Andrew Morton <akpm@linux-foundation.org> > > Should I take these, or would the mips tree be preferred? I'm OK > either way, but probably the MIPS tree would be better? Thanks for reviewing again and again. This patch is based on mips-next, maybe MIPS tree will be better.
On Wed, May 27, 2020 at 09:05:41AM +0800, maobibo wrote: > > > On 05/26/2020 05:44 AM, Andrew Morton wrote: > > On Mon, 25 May 2020 10:52:39 +0800 Bibo Mao <maobibo@loongson.cn> wrote: > > > >> Here add pte_sw_mkyoung function to make page readable on MIPS > >> platform during page fault handling. This patch improves page > >> fault latency about 10% on my MIPS machine with lmbench > >> lat_pagefault case. > >> > >> It is noop function on other arches, there is no negative > >> influence on those architectures. > > > > Acked-by: Andrew Morton <akpm@linux-foundation.org> > > > > Should I take these, or would the mips tree be preferred? I'm OK > > either way, but probably the MIPS tree would be better? > Thanks for reviewing again and again. > This patch is based on mips-next, maybe MIPS tree will be better. I'll take your next version then. Thomas.
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index d2004b5..0743087 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -414,6 +414,8 @@ static inline pte_t pte_mkyoung(pte_t pte) return pte; } +#define pte_sw_mkyoung pte_mkyoung + #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; } diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index fa5c73f..b5278ec 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h @@ -244,6 +244,22 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres } #endif +/* + * On some architectures hardware does not set page access bit when accessing + * memory page, it is responsibilty of software setting this bit. It brings + * out extra page fault penalty to track page access bit. For optimization page + * access bit can be set during all page fault flow on these arches. + * To be differentiate with macro pte_mkyoung, this macro is used on platforms + * where software maintains page access bit. + */ +#ifndef pte_sw_mkyoung +static inline pte_t pte_sw_mkyoung(pte_t pte) +{ + return pte; +} +#define pte_sw_mkyoung pte_sw_mkyoung +#endif + #ifndef pte_savedwrite #define pte_savedwrite pte_write #endif diff --git a/mm/memory.c b/mm/memory.c index 8bb31c4..c7c8960 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -2704,6 +2704,7 @@ static vm_fault_t wp_page_copy(struct vm_fault *vmf) } flush_cache_page(vma, vmf->address, pte_pfn(vmf->orig_pte)); entry = mk_pte(new_page, vma->vm_page_prot); + entry = pte_sw_mkyoung(entry); entry = maybe_mkwrite(pte_mkdirty(entry), vma); /* * Clear the pte entry and flush it first, before updating the @@ -3378,6 +3379,7 @@ static vm_fault_t do_anonymous_page(struct vm_fault *vmf) __SetPageUptodate(page); entry = mk_pte(page, vma->vm_page_prot); + entry = pte_sw_mkyoung(entry); if (vma->vm_flags & VM_WRITE) entry = pte_mkwrite(pte_mkdirty(entry)); @@ -3660,6 +3662,7 @@ vm_fault_t alloc_set_pte(struct vm_fault *vmf, struct mem_cgroup *memcg, flush_icache_page(vma, page); entry = mk_pte(page, vma->vm_page_prot); + entry = pte_sw_mkyoung(entry); if (write) entry = maybe_mkwrite(pte_mkdirty(entry), vma); /* copy-on-write page */
Here add pte_sw_mkyoung function to make page readable on MIPS platform during page fault handling. This patch improves page fault latency about 10% on my MIPS machine with lmbench lat_pagefault case. It is noop function on other arches, there is no negative influence on those architectures. Signed-off-by: Bibo Mao <maobibo@loongson.cn> --- arch/mips/include/asm/pgtable.h | 2 ++ include/asm-generic/pgtable.h | 16 ++++++++++++++++ mm/memory.c | 3 +++ 3 files changed, 21 insertions(+)