| Message ID | 20200513134140.25357-3-lars.povlsen@microchip.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | hwmon: Adding support for Microchip Sparx5 SoC | expand |
On Wed, May 13, 2020 at 03:41:39PM +0200, Lars Povlsen wrote: > This adds a hwmon temperature node sensor to the Sparx5 SoC. > > Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> > --- > arch/arm64/boot/dts/microchip/sparx5.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi > index f09a49c41ce19..b5f2d088af30e 100644 > --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi > +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi > @@ -233,5 +233,11 @@ i2c1: i2c@600103000 { > clock-frequency = <100000>; > clocks = <&ahb_clk>; > }; > + > + tmon0: tmon@610508110 { > + compatible = "microchip,sparx5-temp"; > + reg = <0x6 0x10508110 0xc>; These nodes are all very odd with a couple of registers spread out at randomish addresses. DT nodes should roughly correlate to h/w blocks, not sets of registers for a driver like this seems to be. Please make the dts files one patch. Reviewing a node at a time is not all that effective. Rob
Hi Rob, On 27/05/2020 20:29:31-0600, Rob Herring wrote: > On Wed, May 13, 2020 at 03:41:39PM +0200, Lars Povlsen wrote: > > This adds a hwmon temperature node sensor to the Sparx5 SoC. > > > > Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> > > --- > > arch/arm64/boot/dts/microchip/sparx5.dtsi | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi > > index f09a49c41ce19..b5f2d088af30e 100644 > > --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi > > +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi > > @@ -233,5 +233,11 @@ i2c1: i2c@600103000 { > > clock-frequency = <100000>; > > clocks = <&ahb_clk>; > > }; > > + > > + tmon0: tmon@610508110 { > > + compatible = "microchip,sparx5-temp"; > > + reg = <0x6 0x10508110 0xc>; > > These nodes are all very odd with a couple of registers spread out at > randomish addresses. DT nodes should roughly correlate to h/w blocks, > not sets of registers for a driver like this seems to be. > The DT nodes correlates to HW block, this and the previous families of SoCs were designed with packed registers. There is no padding between HW block registers.
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index f09a49c41ce19..b5f2d088af30e 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -233,5 +233,11 @@ i2c1: i2c@600103000 { clock-frequency = <100000>; clocks = <&ahb_clk>; }; + + tmon0: tmon@610508110 { + compatible = "microchip,sparx5-temp"; + reg = <0x6 0x10508110 0xc>; + #thermal-sensor-cells = <0>; + }; }; };