Message ID | 20200513140031.25633-2-lars.povlsen@microchip.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | spi: Adding support for Microchip Sparx5 SoC | expand |
On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: > With this change a SPI controller can be added without having a IRQ > associated, and causing all transfers to be polled. For SPI controllers > without DMA, this can significantly improve performance by less > interrupt handling overhead. This overlaps substantially with some work that Serge Semin (CCed) has in progress, please coordinate with him.
On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: > +#define VALID_IRQ(i) (i >= 0) > + This isn't something that should be defined by an individual driver, it should be in a generic header.
On Wed, May 13, 2020 at 5:03 PM Lars Povlsen <lars.povlsen@microchip.com> wrote: > > With this change a SPI controller can be added without having a IRQ > associated, and causing all transfers to be polled. For SPI controllers > without DMA, this can significantly improve performance by less > interrupt handling overhead. ... > +#define VALID_IRQ(i) (i >= 0) drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0) Candidate to be in include/linux/irq.h ? ... > + if (VALID_IRQ(dws->irq)) > + free_irq(dws->irq, master); Isn't free_irq() aware of invalid ones (not found IRQ in the tree or any other backend container won't do anything)? > err_free_master: > spi_controller_put(master); > return ret; > -- > 2.26.2 -- With Best Regards, Andy Shevchenko
Hi Mark On Wed, May 13, 2020 at 03:20:50PM +0100, Mark Brown wrote: > On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: > > With this change a SPI controller can be added without having a IRQ > > associated, and causing all transfers to be polled. For SPI controllers > > without DMA, this can significantly improve performance by less > > interrupt handling overhead. > > This overlaps substantially with some work that Serge Semin (CCed) has > in progress, please coordinate with him. Thanks for copying me these mails. I haven't been Cc'ed in the series and hasn't been subscribed to the SPI mailing list, so I would have definitely missed that. I would like to coordinate my efforts with Lars. I'll have the patchset reviewed soon in addition providing my comments/suggestions of how to make it useful for both mine and Lars solution. One thing I can tell about the mem_ops he implemented, is that they aren't mem_ops, but dirmap (as you remember it's also implemented in my code, but with alignment specific), and the exec_mem_op partly consists of a code, which belong to the supports_op() callback. The rest of my comments will be inlined in the patches. -Sergey
Serge Semin writes: > Hi Mark > > On Wed, May 13, 2020 at 03:20:50PM +0100, Mark Brown wrote: >> On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: >> > With this change a SPI controller can be added without having a IRQ >> > associated, and causing all transfers to be polled. For SPI controllers >> > without DMA, this can significantly improve performance by less >> > interrupt handling overhead. >> >> This overlaps substantially with some work that Serge Semin (CCed) has >> in progress, please coordinate with him. > > Thanks for copying me these mails. I haven't been Cc'ed in the series and > hasn't been subscribed to the SPI mailing list, so I would have definitely > missed that. > > I would like to coordinate my efforts with Lars. I'll have the patchset reviewed > soon in addition providing my comments/suggestions of how to make it useful for > both mine and Lars solution. Serge - thanks for taking on this. Note that my primary concern now is to get Sparx5 upstreamed. The mem_ops (or dirmap) and polled mode are both performance enhancements, which can be pulled from my series if it creates too much noise. I can then add the necessary on top of your work/current kernel at a later time. > One thing I can tell about the mem_ops he implemented, is that they aren't > mem_ops, but dirmap (as you remember it's also implemented in my code, but with > alignment specific), and the exec_mem_op partly consists of a code, which belong > to the supports_op() callback. The rest of my comments will be inlined in the > patches. > > -Sergey
On 13/05/20 15:37, Mark Brown wrote: > Date: Wed, 13 May 2020 15:37:53 +0100 > From: Mark Brown <broonie@kernel.org> > To: Lars Povlsen <lars.povlsen@microchip.com> > Cc: SoC Team <soc@kernel.org>, Microchip Linux Driver Support > <UNGLinuxDriver@microchip.com>, linux-spi@vger.kernel.org, > devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, > linux-arm-kernel@lists.infradead.org, Alexandre Belloni > <alexandre.belloni@bootlin.com> > Subject: Re: [PATCH 01/10] spi: dw: Add support for polled operation via no > IRQ specified in DT > User-Agent: Mutt/1.10.1 (2018-07-13) > > On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: > > > +#define VALID_IRQ(i) (i >= 0) > > + > > This isn't something that should be defined by an individual driver, it > should be in a generic header. Thanks, I will work with Serge on getting this integrated right. ---Lars
Andy Shevchenko writes: > On Wed, May 13, 2020 at 5:03 PM Lars Povlsen <lars.povlsen@microchip.com> wrote: >> >> With this change a SPI controller can be added without having a IRQ >> associated, and causing all transfers to be polled. For SPI controllers >> without DMA, this can significantly improve performance by less >> interrupt handling overhead. > > ... > >> +#define VALID_IRQ(i) (i >= 0) > > drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0) > > Candidate to be in include/linux/irq.h ? > > ... > >> + if (VALID_IRQ(dws->irq)) >> + free_irq(dws->irq, master); > > Isn't free_irq() aware of invalid ones (not found IRQ in the tree or > any other backend container won't do anything)? > > >> err_free_master: >> spi_controller_put(master); >> return ret; >> -- >> 2.26.2 I'll rework this with Serge. Thank you!
On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: > With this change a SPI controller can be added without having a IRQ > associated, and causing all transfers to be polled. For SPI controllers > without DMA, this can significantly improve performance by less > interrupt handling overhead. > > Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> > --- > drivers/spi/spi-dw.c | 21 +++++++++++++-------- > 1 file changed, 13 insertions(+), 8 deletions(-) > > diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c > index 31e3f866d11a7..e572eb34a3c1a 100644 > --- a/drivers/spi/spi-dw.c > +++ b/drivers/spi/spi-dw.c > @@ -19,6 +19,8 @@ > #include <linux/debugfs.h> > #endif > > +#define VALID_IRQ(i) (i >= 0) Mark and Andy are right. It is a good candidate to be in a generic IRQ-related code as Anyd suggested: > > drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0) > > Candidate to be in include/linux/irq.h ? So if you feel like to author additional useful patch integrated into the kernel, this one is a good chance for it. > + > /* Slave spi_dev related */ > struct chip_data { > u8 tmode; /* TR/TO/RO/EEPROM */ > @@ -359,7 +361,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, > spi_enable_chip(dws, 1); > return ret; > } > - } else if (!chip->poll_mode) { > + } else if (!chip->poll_mode && VALID_IRQ(dws->irq)) { > txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes); > dw_writel(dws, DW_SPI_TXFLTR, txlevel); > > @@ -379,7 +381,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, > return ret; > } > > - if (chip->poll_mode) > + if (chip->poll_mode || !VALID_IRQ(dws->irq)) > return poll_transfer(dws); Please note. The chip->poll and the poll_transfer() methods've been discarded from the driver, since commit 1ceb09717e98 ("spi: dw: remove cs_control and poll_mode members from chip_data"). So you gonna have to get the poll_transfer-like method back. -Sergey > > return 1; > @@ -487,11 +489,13 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) > > spi_controller_set_devdata(master, dws); > > - ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), > - master); > - if (ret < 0) { > - dev_err(dev, "can not get IRQ\n"); > - goto err_free_master; > + if (VALID_IRQ(dws->irq)) { > + ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, > + dev_name(dev), master); > + if (ret < 0) { > + dev_err(dev, "can not get IRQ\n"); > + goto err_free_master; > + } > } > > master->use_gpio_descriptors = true; > @@ -539,7 +543,8 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) > if (dws->dma_ops && dws->dma_ops->dma_exit) > dws->dma_ops->dma_exit(dws); > spi_enable_chip(dws, 0); > - free_irq(dws->irq, master); > + if (VALID_IRQ(dws->irq)) > + free_irq(dws->irq, master); > err_free_master: > spi_controller_put(master); > return ret; > -- > 2.26.2 > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Serge Semin writes: > On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote: >> With this change a SPI controller can be added without having a IRQ >> associated, and causing all transfers to be polled. For SPI controllers >> without DMA, this can significantly improve performance by less >> interrupt handling overhead. >> >> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> >> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> >> --- >> drivers/spi/spi-dw.c | 21 +++++++++++++-------- >> 1 file changed, 13 insertions(+), 8 deletions(-) >> >> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c >> index 31e3f866d11a7..e572eb34a3c1a 100644 >> --- a/drivers/spi/spi-dw.c >> +++ b/drivers/spi/spi-dw.c >> @@ -19,6 +19,8 @@ >> #include <linux/debugfs.h> >> #endif >> > >> +#define VALID_IRQ(i) (i >= 0) > > Mark and Andy are right. It is a good candidate to be in a generic IRQ-related > code as Anyd suggested: > >> > drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0) >> > Candidate to be in include/linux/irq.h ? > > So if you feel like to author additional useful patch integrated into the > kernel, this one is a good chance for it. > Yeah, but with the poll_transfer() gone below, I think I'll settle on just getting this into the current framework. Optimization (as this is) has less priority. I'll put this on the back burner. >> + >> /* Slave spi_dev related */ >> struct chip_data { >> u8 tmode; /* TR/TO/RO/EEPROM */ >> @@ -359,7 +361,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, >> spi_enable_chip(dws, 1); >> return ret; >> } >> - } else if (!chip->poll_mode) { >> + } else if (!chip->poll_mode && VALID_IRQ(dws->irq)) { >> txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes); >> dw_writel(dws, DW_SPI_TXFLTR, txlevel); >> >> @@ -379,7 +381,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, >> return ret; >> } >> >> - if (chip->poll_mode) >> + if (chip->poll_mode || !VALID_IRQ(dws->irq)) >> return poll_transfer(dws); > > Please note. The chip->poll and the poll_transfer() methods've been discarded > from the driver, since commit 1ceb09717e98 ("spi: dw: remove cs_control and > poll_mode members from chip_data"). So you gonna have to get the > poll_transfer-like method back. > > -Sergey > >> >> return 1; >> @@ -487,11 +489,13 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) >> >> spi_controller_set_devdata(master, dws); >> >> - ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), >> - master); >> - if (ret < 0) { >> - dev_err(dev, "can not get IRQ\n"); >> - goto err_free_master; >> + if (VALID_IRQ(dws->irq)) { >> + ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, >> + dev_name(dev), master); >> + if (ret < 0) { >> + dev_err(dev, "can not get IRQ\n"); >> + goto err_free_master; >> + } >> } >> >> master->use_gpio_descriptors = true; >> @@ -539,7 +543,8 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) >> if (dws->dma_ops && dws->dma_ops->dma_exit) >> dws->dma_ops->dma_exit(dws); >> spi_enable_chip(dws, 0); >> - free_irq(dws->irq, master); >> + if (VALID_IRQ(dws->irq)) >> + free_irq(dws->irq, master); >> err_free_master: >> spi_controller_put(master); >> return ret; >> -- >> 2.26.2 >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index 31e3f866d11a7..e572eb34a3c1a 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -19,6 +19,8 @@ #include <linux/debugfs.h> #endif +#define VALID_IRQ(i) (i >= 0) + /* Slave spi_dev related */ struct chip_data { u8 tmode; /* TR/TO/RO/EEPROM */ @@ -359,7 +361,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, spi_enable_chip(dws, 1); return ret; } - } else if (!chip->poll_mode) { + } else if (!chip->poll_mode && VALID_IRQ(dws->irq)) { txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes); dw_writel(dws, DW_SPI_TXFLTR, txlevel); @@ -379,7 +381,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, return ret; } - if (chip->poll_mode) + if (chip->poll_mode || !VALID_IRQ(dws->irq)) return poll_transfer(dws); return 1; @@ -487,11 +489,13 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) spi_controller_set_devdata(master, dws); - ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), - master); - if (ret < 0) { - dev_err(dev, "can not get IRQ\n"); - goto err_free_master; + if (VALID_IRQ(dws->irq)) { + ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, + dev_name(dev), master); + if (ret < 0) { + dev_err(dev, "can not get IRQ\n"); + goto err_free_master; + } } master->use_gpio_descriptors = true; @@ -539,7 +543,8 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) if (dws->dma_ops && dws->dma_ops->dma_exit) dws->dma_ops->dma_exit(dws); spi_enable_chip(dws, 0); - free_irq(dws->irq, master); + if (VALID_IRQ(dws->irq)) + free_irq(dws->irq, master); err_free_master: spi_controller_put(master); return ret;