diff mbox series

[1/3] phy: qcom-qmp: Allow different values for second lane

Message ID 20200524021416.17049-2-jonathan@marek.ca (mailing list archive)
State Accepted
Commit 5dcbc71126e1dc41e32810af3f24b4a318eba5b3
Headers show
Series phy: qcom-qmp: add V4 USB PHYs | expand

Commit Message

Jonathan Marek May 24, 2020, 2:14 a.m. UTC 
The primary USB PHY on sm8250 sets some values differently for the second
lane. This makes it possible to represent that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 52 ++++++++++++++++++++++-------
 1 file changed, 40 insertions(+), 12 deletions(-)

Comments

Dmitry Baryshkov June 25, 2020, 7:41 p.m. UTC | #1 
On 24/05/2020 05:14, Jonathan Marek wrote:
> The primary USB PHY on sm8250 sets some values differently for the second
> lane. This makes it possible to represent that.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Bjorn Andersson June 26, 2020, 7:35 a.m. UTC | #2 
On Sat 23 May 19:14 PDT 2020, Jonathan Marek wrote:

> The primary USB PHY on sm8250 sets some values differently for the second
> lane. This makes it possible to represent that.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp.c | 52 ++++++++++++++++++++++-------
>  1 file changed, 40 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> index e91040af3394..b3e07afca3ca 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> @@ -82,20 +82,34 @@ struct qmp_phy_init_tbl {
>  	 * register part of layout ?
>  	 * if yes, then offset gives index in the reg-layout
>  	 */
> -	int in_layout;
> +	bool in_layout;
> +	/*
> +	 * mask of lanes for which this register is written
> +	 * for cases when second lane needs different values
> +	 */
> +	u8 lane_mask;
>  };
>  
>  #define QMP_PHY_INIT_CFG(o, v)		\
>  	{				\
>  		.offset = o,		\
>  		.val = v,		\
> +		.lane_mask = 0xff,	\
>  	}
>  
>  #define QMP_PHY_INIT_CFG_L(o, v)	\
>  	{				\
>  		.offset = o,		\
>  		.val = v,		\
> -		.in_layout = 1,		\
> +		.in_layout = true,	\
> +		.lane_mask = 0xff,	\
> +	}
> +
> +#define QMP_PHY_INIT_CFG_LANE(o, v, l)	\
> +	{				\
> +		.offset = o,		\
> +		.val = v,		\
> +		.lane_mask = l,		\
>  	}
>  
>  /* set of registers with offsets different per-PHY */
> @@ -1986,10 +2000,11 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
>  	.is_dual_lane_phy	= true,
>  };
>  
> -static void qcom_qmp_phy_configure(void __iomem *base,
> -				   const unsigned int *regs,
> -				   const struct qmp_phy_init_tbl tbl[],
> -				   int num)
> +static void qcom_qmp_phy_configure_lane(void __iomem *base,
> +					const unsigned int *regs,
> +					const struct qmp_phy_init_tbl tbl[],
> +					int num,
> +					u8 lane_mask)
>  {
>  	int i;
>  	const struct qmp_phy_init_tbl *t = tbl;
> @@ -1998,6 +2013,9 @@ static void qcom_qmp_phy_configure(void __iomem *base,
>  		return;
>  
>  	for (i = 0; i < num; i++, t++) {
> +		if (!(t->lane_mask & lane_mask))
> +			continue;
> +
>  		if (t->in_layout)
>  			writel(t->val, base + regs[t->offset]);
>  		else
> @@ -2005,6 +2023,14 @@ static void qcom_qmp_phy_configure(void __iomem *base,
>  	}
>  }
>  
> +static void qcom_qmp_phy_configure(void __iomem *base,
> +				   const unsigned int *regs,
> +				   const struct qmp_phy_init_tbl tbl[],
> +				   int num)
> +{
> +	qcom_qmp_phy_configure_lane(base, regs, tbl, num, 0xff);
> +}
> +
>  static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
>  {
>  	struct qcom_qmp *qmp = qphy->qmp;
> @@ -2219,16 +2245,18 @@ static int qcom_qmp_phy_enable(struct phy *phy)
>  	}
>  
>  	/* Tx, Rx, and PCS configurations */
> -	qcom_qmp_phy_configure(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num);
> +	qcom_qmp_phy_configure_lane(tx, cfg->regs,
> +				    cfg->tx_tbl, cfg->tx_tbl_num, 1);

Please ignore the 80-char suggestion and keep this on one line.

With that...
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

>  	/* Configuration for other LANE for USB-DP combo PHY */
>  	if (cfg->is_dual_lane_phy)
> -		qcom_qmp_phy_configure(qphy->tx2, cfg->regs,
> -				       cfg->tx_tbl, cfg->tx_tbl_num);
> +		qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs,
> +					    cfg->tx_tbl, cfg->tx_tbl_num, 2);
>  
> -	qcom_qmp_phy_configure(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num);
> +	qcom_qmp_phy_configure_lane(rx, cfg->regs,
> +				    cfg->rx_tbl, cfg->rx_tbl_num, 1);
>  	if (cfg->is_dual_lane_phy)
> -		qcom_qmp_phy_configure(qphy->rx2, cfg->regs,
> -				       cfg->rx_tbl, cfg->rx_tbl_num);
> +		qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs,
> +					    cfg->rx_tbl, cfg->rx_tbl_num, 2);
>  
>  	qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
>  	ret = reset_control_deassert(qmp->ufs_reset);
> -- 
> 2.26.1
>
diff mbox series

Patch

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index e91040af3394..b3e07afca3ca 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -82,20 +82,34 @@  struct qmp_phy_init_tbl {
 	 * register part of layout ?
 	 * if yes, then offset gives index in the reg-layout
 	 */
-	int in_layout;
+	bool in_layout;
+	/*
+	 * mask of lanes for which this register is written
+	 * for cases when second lane needs different values
+	 */
+	u8 lane_mask;
 };
 
 #define QMP_PHY_INIT_CFG(o, v)		\
 	{				\
 		.offset = o,		\
 		.val = v,		\
+		.lane_mask = 0xff,	\
 	}
 
 #define QMP_PHY_INIT_CFG_L(o, v)	\
 	{				\
 		.offset = o,		\
 		.val = v,		\
-		.in_layout = 1,		\
+		.in_layout = true,	\
+		.lane_mask = 0xff,	\
+	}
+
+#define QMP_PHY_INIT_CFG_LANE(o, v, l)	\
+	{				\
+		.offset = o,		\
+		.val = v,		\
+		.lane_mask = l,		\
 	}
 
 /* set of registers with offsets different per-PHY */
@@ -1986,10 +2000,11 @@  static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
 	.is_dual_lane_phy	= true,
 };
 
-static void qcom_qmp_phy_configure(void __iomem *base,
-				   const unsigned int *regs,
-				   const struct qmp_phy_init_tbl tbl[],
-				   int num)
+static void qcom_qmp_phy_configure_lane(void __iomem *base,
+					const unsigned int *regs,
+					const struct qmp_phy_init_tbl tbl[],
+					int num,
+					u8 lane_mask)
 {
 	int i;
 	const struct qmp_phy_init_tbl *t = tbl;
@@ -1998,6 +2013,9 @@  static void qcom_qmp_phy_configure(void __iomem *base,
 		return;
 
 	for (i = 0; i < num; i++, t++) {
+		if (!(t->lane_mask & lane_mask))
+			continue;
+
 		if (t->in_layout)
 			writel(t->val, base + regs[t->offset]);
 		else
@@ -2005,6 +2023,14 @@  static void qcom_qmp_phy_configure(void __iomem *base,
 	}
 }
 
+static void qcom_qmp_phy_configure(void __iomem *base,
+				   const unsigned int *regs,
+				   const struct qmp_phy_init_tbl tbl[],
+				   int num)
+{
+	qcom_qmp_phy_configure_lane(base, regs, tbl, num, 0xff);
+}
+
 static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
 {
 	struct qcom_qmp *qmp = qphy->qmp;
@@ -2219,16 +2245,18 @@  static int qcom_qmp_phy_enable(struct phy *phy)
 	}
 
 	/* Tx, Rx, and PCS configurations */
-	qcom_qmp_phy_configure(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num);
+	qcom_qmp_phy_configure_lane(tx, cfg->regs,
+				    cfg->tx_tbl, cfg->tx_tbl_num, 1);
 	/* Configuration for other LANE for USB-DP combo PHY */
 	if (cfg->is_dual_lane_phy)
-		qcom_qmp_phy_configure(qphy->tx2, cfg->regs,
-				       cfg->tx_tbl, cfg->tx_tbl_num);
+		qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs,
+					    cfg->tx_tbl, cfg->tx_tbl_num, 2);
 
-	qcom_qmp_phy_configure(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num);
+	qcom_qmp_phy_configure_lane(rx, cfg->regs,
+				    cfg->rx_tbl, cfg->rx_tbl_num, 1);
 	if (cfg->is_dual_lane_phy)
-		qcom_qmp_phy_configure(qphy->rx2, cfg->regs,
-				       cfg->rx_tbl, cfg->rx_tbl_num);
+		qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs,
+					    cfg->rx_tbl, cfg->rx_tbl_num, 2);
 
 	qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 	ret = reset_control_deassert(qmp->ufs_reset);