| Message ID | 20200617105042.3824116-6-noltari@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8079cfba4c7b8cae900c27104b4512fa5ed1f021 |
| Headers | show |
| Series | bmips: add bcm6345 reset controller support | expand |
On Wed, 17 Jun 2020 12:50:37 +0200, Álvaro Fernández Rojas wrote: > BCM6358 SoCs have a reset controller for certain components. > > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > Acked-by: Florian Fainelli <f.fainelli@gmail.com> > --- > v7: no changes. > v6: no changes. > v5: no changes. > v4: no changes. > v3: add reset controller definitions header file. > v2: no changes. > > arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++ > include/dt-bindings/reset/bcm6358-reset.h | 15 +++++++++++++++ > 2 files changed, 21 insertions(+) > create mode 100644 include/dt-bindings/reset/bcm6358-reset.h > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi index f21176cac038..9d93e7f5e6fc 100644 --- a/arch/mips/boot/dts/brcm/bcm6358.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi @@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c { interrupts = <2>, <3>; }; + periph_rst: reset-controller@fffe0034 { + compatible = "brcm,bcm6345-reset"; + reg = <0xfffe0034 0x4>; + #reset-cells = <1>; + }; + leds0: led-controller@fffe00d0 { #address-cells = <1>; #size-cells = <0>; diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h new file mode 100644 index 000000000000..bda62ef84f5a --- /dev/null +++ b/include/dt-bindings/reset/bcm6358-reset.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_RESET_BCM6358_H +#define __DT_BINDINGS_RESET_BCM6358_H + +#define BCM6358_RST_SPI 0 +#define BCM6358_RST_ENET 2 +#define BCM6358_RST_MPI 3 +#define BCM6358_RST_EPHY 6 +#define BCM6358_RST_SAR 7 +#define BCM6358_RST_USBH 12 +#define BCM6358_RST_PCM 13 +#define BCM6358_RST_ADSL 14 + +#endif /* __DT_BINDINGS_RESET_BCM6358_H */