diff mbox series

[1/4] dt-bindings: mediatek: add mediatek,infracfg phandle

Message ID 20200702093721.6063-1-miles.chen@mediatek.com (mailing list archive)
State New, archived
Headers show
Series [1/4] dt-bindings: mediatek: add mediatek,infracfg phandle | expand

Commit Message

Miles Chen July 2, 2020, 9:37 a.m. UTC
Add a description for mediatek,infracfg. We can check if 4GB mode
is enable by reading it instead of checking the unexported
symbol "max_pfn".

This is a step towards building mtk_iommu as a kernel module.

Cc: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
---
 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 2 ++
 1 file changed, 2 insertions(+)

Comments

Rob Herring (Arm) July 15, 2020, 8:51 p.m. UTC | #1
On Thu, Jul 02, 2020 at 05:37:17PM +0800, Miles Chen wrote:
> Add a description for mediatek,infracfg. We can check if 4GB mode
> is enable by reading it instead of checking the unexported
> symbol "max_pfn".
> 
> This is a step towards building mtk_iommu as a kernel module.

You determined this before without DT, so it is an OS problem and 
shouldn't need a DT update.

I'd assume there's only one instance of the node mediatek,infracfg 
points to, so just search for it if you want to get the info from DT.


> 
> Cc: Yong Wu <yong.wu@mediatek.com>
> Signed-off-by: Miles Chen <miles.chen@mediatek.com>
> ---
>  Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> index ce59a505f5a4..a7881deabcca 100644
> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> @@ -74,6 +74,8 @@ Required properties:
>  - mediatek,larbs : List of phandle to the local arbiters in the current Socs.
>  	Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
>  	according to the local arbiter index, like larb0, larb1, larb2...
> +- mediatek,infracfg: a phandle to infracfg. It is used to confirm if 4GB mode is set.
> +	It is an optional property, add it when the SoC have 4g mode.
>  - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
>  	Specifies the mtk_m4u_id as defined in
>  	dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
> -- 
> 2.18.0
Miles Chen July 17, 2020, 8:18 a.m. UTC | #2
On Wed, 2020-07-15 at 14:51 -0600, Rob Herring wrote:
> On Thu, Jul 02, 2020 at 05:37:17PM +0800, Miles Chen wrote:
> > Add a description for mediatek,infracfg. We can check if 4GB mode
> > is enable by reading it instead of checking the unexported
> > symbol "max_pfn".
> > 
> > This is a step towards building mtk_iommu as a kernel module.
> 
> You determined this before without DT, so it is an OS problem and 
> shouldn't need a DT update.

Thanks for your comment.

The old way (using max_pfn) do determine this is risky because the
max_pfn may lower than (GB if reserved memory regions occupy memory
higher than 4GB.

So, the better way to do this is by reading register from H/W.
> 
> I'd assume there's only one instance of the node mediatek,infracfg 
> points to, so just search for it if you want to get the info from DT.
> 
I can do syscon_regmap_lookup_by_compatible() to search for it. However,
the compatibles are different in mt2712e.dtsi and mt8173.dtsi. so I have
to search "mediatek,mt2712-infracfg" and "mediatek,mt8173-infracfg"
respectively.

Using mediatek,infracfg phandle can make the code easier to read.
Is it possible to reconsider the phandle approach, please?


arch/arm64/boot/dts/mediatek/mt2712e.dtsi:253:
infracfg: syscon@10001000 {
compatible = "mediatek,mt2712-infracfg", "syscon";
arch/arm64/boot/dts/mediatek/mt8173.dtsi:363:                   
infracfg: power-controller@10001000 {
compatible = "mediatek,mt8173-infracfg", "syscon";



> 
> > 
> > Cc: Yong Wu <yong.wu@mediatek.com>
> > Signed-off-by: Miles Chen <miles.chen@mediatek.com>
> > ---
> >  Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > index ce59a505f5a4..a7881deabcca 100644
> > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > @@ -74,6 +74,8 @@ Required properties:
> >  - mediatek,larbs : List of phandle to the local arbiters in the current Socs.
> >  	Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
> >  	according to the local arbiter index, like larb0, larb1, larb2...
> > +- mediatek,infracfg: a phandle to infracfg. It is used to confirm if 4GB mode is set.
> > +	It is an optional property, add it when the SoC have 4g mode.
> >  - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
> >  	Specifies the mtk_m4u_id as defined in
> >  	dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
> > -- 
> > 2.18.0
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
index ce59a505f5a4..a7881deabcca 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
@@ -74,6 +74,8 @@  Required properties:
 - mediatek,larbs : List of phandle to the local arbiters in the current Socs.
 	Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
 	according to the local arbiter index, like larb0, larb1, larb2...
+- mediatek,infracfg: a phandle to infracfg. It is used to confirm if 4GB mode is set.
+	It is an optional property, add it when the SoC have 4g mode.
 - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
 	Specifies the mtk_m4u_id as defined in
 	dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623