diff mbox series

[v2] target/arm: Fix decode of LDRA[AB] instructions

Message ID 20200804002849.30268-1-pcc@google.com (mailing list archive)
State New, archived
Headers show
Series [v2] target/arm: Fix decode of LDRA[AB] instructions | expand

Commit Message

Peter Collingbourne Aug. 4, 2020, 12:28 a.m. UTC
These instructions use zero as the discriminator, not SP.

Signed-off-by: Peter Collingbourne <pcc@google.com>
---
v2:
- fixed commit message

 target/arm/translate-a64.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Richard Henderson Aug. 4, 2020, 3:46 p.m. UTC | #1
On 8/3/20 5:28 PM, Peter Collingbourne wrote:
> These instructions use zero as the discriminator, not SP.
> 
> Signed-off-by: Peter Collingbourne <pcc@google.com>
> ---
> v2:
> - fixed commit message

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Peter Maydell Aug. 4, 2020, 3:54 p.m. UTC | #2
On Tue, 4 Aug 2020 at 16:46, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 8/3/20 5:28 PM, Peter Collingbourne wrote:
> > These instructions use zero as the discriminator, not SP.
> >
> > Signed-off-by: Peter Collingbourne <pcc@google.com>
> > ---
> > v2:
> > - fixed commit message
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



Applied to target-arm.next, thanks.

-- PMM
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 8c0764957c..c996ca1393 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -3429,9 +3429,11 @@  static void disas_ldst_pac(DisasContext *s, uint32_t insn,
 
     if (s->pauth_active) {
         if (use_key_a) {
-            gen_helper_autda(dirty_addr, cpu_env, dirty_addr, cpu_X[31]);
+            gen_helper_autda(dirty_addr, cpu_env, dirty_addr,
+                             new_tmp_a64_zero(s));
         } else {
-            gen_helper_autdb(dirty_addr, cpu_env, dirty_addr, cpu_X[31]);
+            gen_helper_autdb(dirty_addr, cpu_env, dirty_addr,
+                             new_tmp_a64_zero(s));
         }
     }