diff mbox series

[RESEND,v7,1/7] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display

Message ID 1596855231-5782-2-git-send-email-yongqiang.niu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series add drm support for MT8183 | expand

Commit Message

Yongqiang Niu Aug. 8, 2020, 2:53 a.m. UTC
rdma fifo size may be different even in same SOC, add this
property to the corresponding rdma

Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Chun-Kuang Hu Aug. 9, 2020, 12:56 a.m. UTC | #1
Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午11:04寫道:
>
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
>
> Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9

Remove change-id.

> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index b91e709..e6bbe32 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -66,6 +66,11 @@ Required properties (DMA function blocks):
>    argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
>    for details.
>
> +Optional properties (RDMA function blocks):
> +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
> +  property to the corresponding rdma
> +  the value is the Max value which defined in hardware data sheet.
> +
>  Examples:
>
>  mmsys: clock-controller@14000000 {
> @@ -207,3 +212,12 @@ od@14023000 {
>         power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
>         clocks = <&mmsys CLK_MM_DISP_OD>;
>  };
> +
> +rdma1: rdma@1400c000 {
> +       compatible = "mediatek,mt8183-disp-rdma";
> +       reg = <0 0x1400c000 0 0x1000>;
> +       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> +       power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
> +       clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> +       mediatek,rdma_fifo_size = <2048>;
> +};

I would like you to show rdma0 as well so that could prove two rdma
have different fifo size in the same SoC.

Regards,
Chun-Kuang.

> --
> 1.8.1.1.dirty
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Chun-Kuang Hu Aug. 9, 2020, 1:08 a.m. UTC | #2
Hi, Yongqiang:

Chun-Kuang Hu <chunkuang.hu@kernel.org> 於 2020年8月9日 週日 上午8:56寫道:
>
> Hi, Yongqiang:
>
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午11:04寫道:
> >
> > rdma fifo size may be different even in same SOC, add this
> > property to the corresponding rdma
> >
> > Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
>
> Remove change-id.
>
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> >  .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> > index b91e709..e6bbe32 100644
> > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> > @@ -66,6 +66,11 @@ Required properties (DMA function blocks):
> >    argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> >    for details.
> >
> > +Optional properties (RDMA function blocks):
> > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
> > +  property to the corresponding rdma
> > +  the value is the Max value which defined in hardware data sheet.
> > +
> >  Examples:
> >
> >  mmsys: clock-controller@14000000 {
> > @@ -207,3 +212,12 @@ od@14023000 {
> >         power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
> >         clocks = <&mmsys CLK_MM_DISP_OD>;
> >  };
> > +
> > +rdma1: rdma@1400c000 {
> > +       compatible = "mediatek,mt8183-disp-rdma";
> > +       reg = <0 0x1400c000 0 0x1000>;
> > +       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> > +       power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
> > +       clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> > +       mediatek,rdma_fifo_size = <2048>;
> > +};
>
> I would like you to show rdma0 as well so that could prove two rdma
> have different fifo size in the same SoC.

Sorry, rdma0 is already define in this file. Just ignore this comment.

Regards,
Chun-Kuang.

>
> Regards,
> Chun-Kuang.
>
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Rob Herring Aug. 12, 2020, 4:55 p.m. UTC | #3
On Sat, Aug 08, 2020 at 10:53:45AM +0800, Yongqiang Niu wrote:
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
> 
> Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index b91e709..e6bbe32 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -66,6 +66,11 @@ Required properties (DMA function blocks):
>    argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
>    for details.
>  
> +Optional properties (RDMA function blocks):
> +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this

mediatek,rdma-fifo-size

What's the range/set of valid values?

> +  property to the corresponding rdma
> +  the value is the Max value which defined in hardware data sheet.
> +
>  Examples:
>  
>  mmsys: clock-controller@14000000 {
> @@ -207,3 +212,12 @@ od@14023000 {
>  	power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
>  	clocks = <&mmsys CLK_MM_DISP_OD>;
>  };
> +
> +rdma1: rdma@1400c000 {

Does a new property really need a whole new example?

> +	compatible = "mediatek,mt8183-disp-rdma";
> +	reg = <0 0x1400c000 0 0x1000>;
> +	interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> +	power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
> +	clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> +	mediatek,rdma_fifo_size = <2048>;
> +};
> -- 
> 1.8.1.1.dirty
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index b91e709..e6bbe32 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -66,6 +66,11 @@  Required properties (DMA function blocks):
   argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
   for details.
 
+Optional properties (RDMA function blocks):
+- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
+  property to the corresponding rdma
+  the value is the Max value which defined in hardware data sheet.
+
 Examples:
 
 mmsys: clock-controller@14000000 {
@@ -207,3 +212,12 @@  od@14023000 {
 	power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
 	clocks = <&mmsys CLK_MM_DISP_OD>;
 };
+
+rdma1: rdma@1400c000 {
+	compatible = "mediatek,mt8183-disp-rdma";
+	reg = <0 0x1400c000 0 0x1000>;
+	interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+	power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+	clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+	mediatek,rdma_fifo_size = <2048>;
+};