| Message ID | 20200807195526.426056-5-vgoyal@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On Fri, Aug 07, 2020 at 03:55:10PM -0400, Vivek Goyal wrote: > From: Sebastien Boeuf <sebastien.boeuf@intel.com> > > On PCI the shm regions are found using capability entries; > find a region by searching for the capability. > > Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > Signed-off-by: kbuild test robot <lkp@intel.com> > Cc: kvm@vger.kernel.org > Cc: "Michael S. Tsirkin" <mst@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> > --- > drivers/virtio/virtio_pci_modern.c | 96 ++++++++++++++++++++++++++++++ > include/uapi/linux/virtio_pci.h | 11 +++- > 2 files changed, 106 insertions(+), 1 deletion(-) > > diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c > index db93cedd262f..3fc0cd848fe9 100644 > --- a/drivers/virtio/virtio_pci_modern.c > +++ b/drivers/virtio/virtio_pci_modern.c > @@ -444,6 +444,100 @@ static void del_vq(struct virtio_pci_vq_info *info) > vring_del_virtqueue(vq); > } > > +static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, > + u8 *bar, u64 *offset, u64 *len) > +{ > + int pos; > + > + for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR); pos > 0; > + pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) { > + u8 type, cap_len, id; > + u32 tmp32; > + u64 res_offset, res_length; > + > + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, > + cfg_type), &type); > + if (type != VIRTIO_PCI_CAP_SHARED_MEMORY_CFG) > + continue; > + > + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, > + cap_len), &cap_len); > + if (cap_len != sizeof(struct virtio_pci_cap64)) { > + printk(KERN_ERR "%s: shm cap with bad size offset: %d" > + "size: %d\n", __func__, pos, cap_len); > + continue; > + } > + > + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, > + id), &id); > + if (id != required_id) > + continue; > + > + /* Type, and ID match, looks good */ > + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, > + bar), bar); > + > + /* Read the lower 32bit of length and offset */ > + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, > + offset), &tmp32); > + res_offset = tmp32; > + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, > + length), &tmp32); > + res_length = tmp32; > + > + /* and now the top half */ > + pci_read_config_dword(dev, > + pos + offsetof(struct virtio_pci_cap64, > + offset_hi), &tmp32); > + res_offset |= ((u64)tmp32) << 32; > + pci_read_config_dword(dev, > + pos + offsetof(struct virtio_pci_cap64, > + length_hi), &tmp32); > + res_length |= ((u64)tmp32) << 32; > + > + *offset = res_offset; > + *len = res_length; > + > + return pos; > + } > + return 0; > +} > + > +static bool vp_get_shm_region(struct virtio_device *vdev, > + struct virtio_shm_region *region, u8 id) > +{ > + struct virtio_pci_device *vp_dev = to_vp_device(vdev); > + struct pci_dev *pci_dev = vp_dev->pci_dev; > + u8 bar; > + u64 offset, len; > + phys_addr_t phys_addr; > + size_t bar_len; > + > + if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len)) { > + return false; > + } > + > + phys_addr = pci_resource_start(pci_dev, bar); > + bar_len = pci_resource_len(pci_dev, bar); > + > + if ((offset + len) < offset) { > + dev_err(&pci_dev->dev, "%s: cap offset+len overflow detected\n", > + __func__); > + return false; > + } > + > + if (offset + len > bar_len) { > + dev_err(&pci_dev->dev, "%s: bar shorter than cap offset+len\n", > + __func__); > + return false; > + } Maybe move this to a common header so the checks can be reused by other transports? Can be a patch on top. > + > + region->len = len; > + region->addr = (u64) phys_addr + offset; > + > + return true; > +} > + > static const struct virtio_config_ops virtio_pci_config_nodev_ops = { > .get = NULL, > .set = NULL, > @@ -458,6 +552,7 @@ static const struct virtio_config_ops virtio_pci_config_nodev_ops = { > .bus_name = vp_bus_name, > .set_vq_affinity = vp_set_vq_affinity, > .get_vq_affinity = vp_get_vq_affinity, > + .get_shm_region = vp_get_shm_region, > }; > > static const struct virtio_config_ops virtio_pci_config_ops = { > @@ -474,6 +569,7 @@ static const struct virtio_config_ops virtio_pci_config_ops = { > .bus_name = vp_bus_name, > .set_vq_affinity = vp_set_vq_affinity, > .get_vq_affinity = vp_get_vq_affinity, > + .get_shm_region = vp_get_shm_region, > }; > > /** > diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h > index 90007a1abcab..fe9f43680a1d 100644 > --- a/include/uapi/linux/virtio_pci.h > +++ b/include/uapi/linux/virtio_pci.h > @@ -113,6 +113,8 @@ > #define VIRTIO_PCI_CAP_DEVICE_CFG 4 > /* PCI configuration access */ > #define VIRTIO_PCI_CAP_PCI_CFG 5 > +/* Additional shared memory capability */ > +#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8 > > /* This is the PCI capability header: */ > struct virtio_pci_cap { > @@ -121,11 +123,18 @@ struct virtio_pci_cap { > __u8 cap_len; /* Generic PCI field: capability length */ > __u8 cfg_type; /* Identifies the structure. */ > __u8 bar; /* Where to find it. */ > - __u8 padding[3]; /* Pad to full dword. */ > + __u8 id; /* Multiple capabilities of the same type */ > + __u8 padding[2]; /* Pad to full dword. */ > __le32 offset; /* Offset within bar. */ > __le32 length; /* Length of the structure, in bytes. */ > }; > > +struct virtio_pci_cap64 { > + struct virtio_pci_cap cap; > + __le32 offset_hi; /* Most sig 32 bits of offset */ > + __le32 length_hi; /* Most sig 32 bits of length */ > +}; > + > struct virtio_pci_notify_cap { > struct virtio_pci_cap cap; > __le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */ > -- > 2.25.4 >
On Mon, Aug 10, 2020 at 10:05:17AM -0400, Michael S. Tsirkin wrote: > On Fri, Aug 07, 2020 at 03:55:10PM -0400, Vivek Goyal wrote: > > From: Sebastien Boeuf <sebastien.boeuf@intel.com> > > > > On PCI the shm regions are found using capability entries; > > find a region by searching for the capability. > > > > Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > > Signed-off-by: kbuild test robot <lkp@intel.com> > > Cc: kvm@vger.kernel.org > > Cc: "Michael S. Tsirkin" <mst@redhat.com> > > Acked-by: Michael S. Tsirkin <mst@redhat.com> > [..] > > +static bool vp_get_shm_region(struct virtio_device *vdev, > > + struct virtio_shm_region *region, u8 id) > > +{ > > + struct virtio_pci_device *vp_dev = to_vp_device(vdev); > > + struct pci_dev *pci_dev = vp_dev->pci_dev; > > + u8 bar; > > + u64 offset, len; > > + phys_addr_t phys_addr; > > + size_t bar_len; > > + > > + if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len)) { > > + return false; > > + } > > + > > + phys_addr = pci_resource_start(pci_dev, bar); > > + bar_len = pci_resource_len(pci_dev, bar); > > + > > + if ((offset + len) < offset) { > > + dev_err(&pci_dev->dev, "%s: cap offset+len overflow detected\n", > > + __func__); > > + return false; > > + } > > + > > + if (offset + len > bar_len) { > > + dev_err(&pci_dev->dev, "%s: bar shorter than cap offset+len\n", > > + __func__); > > + return false; > > + } > > Maybe move this to a common header so the checks can be reused by > other transports? Can be a patch on top. Will do as patch on top once these patches get merged. Thanks Vivek
On Thu, Aug 13, 2020 at 07:51:56PM -0700, Gurchetan Singh wrote: > On Mon, Aug 10, 2020 at 7:50 AM Vivek Goyal <vgoyal@redhat.com> wrote: > > > On Mon, Aug 10, 2020 at 10:05:17AM -0400, Michael S. Tsirkin wrote: > > > On Fri, Aug 07, 2020 at 03:55:10PM -0400, Vivek Goyal wrote: > > > > From: Sebastien Boeuf <sebastien.boeuf@intel.com> > > > > > > > > On PCI the shm regions are found using capability entries; > > > > find a region by searching for the capability. > > > > > > > > Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> > > > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > > > > Signed-off-by: kbuild test robot <lkp@intel.com> > > > > Cc: kvm@vger.kernel.org > > > > Cc: "Michael S. Tsirkin" <mst@redhat.com> > > > > > > Acked-by: Michael S. Tsirkin <mst@redhat.com> > > > > > > > [..] > > > > +static bool vp_get_shm_region(struct virtio_device *vdev, > > > > + struct virtio_shm_region *region, u8 id) > > > > +{ > > > > + struct virtio_pci_device *vp_dev = to_vp_device(vdev); > > > > + struct pci_dev *pci_dev = vp_dev->pci_dev; > > > > + u8 bar; > > > > + u64 offset, len; > > > > + phys_addr_t phys_addr; > > > > + size_t bar_len; > > > > + > > > > + if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len)) { > > > > + return false; > > > > + } > > > > + > > > > + phys_addr = pci_resource_start(pci_dev, bar); > > > > + bar_len = pci_resource_len(pci_dev, bar); > > > > + > > > > + if ((offset + len) < offset) { > > > > + dev_err(&pci_dev->dev, "%s: cap offset+len overflow > > detected\n", > > > > + __func__); > > > > + return false; > > > > + } > > > > + > > > > + if (offset + len > bar_len) { > > > > + dev_err(&pci_dev->dev, "%s: bar shorter than cap > > offset+len\n", > > > > + __func__); > > > > + return false; > > > > + } > > > > > > Maybe move this to a common header so the checks can be reused by > > > other transports? Can be a patch on top. > > > > Will do as patch on top once these patches get merged. > > > > There's also some minor checkpatch complaints. I fixed them with the > series I sent out with virtio-gpu. Thanks Gurchetan. I will post the patch with V3 posting anyway. We both need these patches. So whatever gets merged in the tree first, other person can use it. Vivek
diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index db93cedd262f..3fc0cd848fe9 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -444,6 +444,100 @@ static void del_vq(struct virtio_pci_vq_info *info) vring_del_virtqueue(vq); } +static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, + u8 *bar, u64 *offset, u64 *len) +{ + int pos; + + for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR); pos > 0; + pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) { + u8 type, cap_len, id; + u32 tmp32; + u64 res_offset, res_length; + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + cfg_type), &type); + if (type != VIRTIO_PCI_CAP_SHARED_MEMORY_CFG) + continue; + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + cap_len), &cap_len); + if (cap_len != sizeof(struct virtio_pci_cap64)) { + printk(KERN_ERR "%s: shm cap with bad size offset: %d" + "size: %d\n", __func__, pos, cap_len); + continue; + } + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + id), &id); + if (id != required_id) + continue; + + /* Type, and ID match, looks good */ + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + bar), bar); + + /* Read the lower 32bit of length and offset */ + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, + offset), &tmp32); + res_offset = tmp32; + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, + length), &tmp32); + res_length = tmp32; + + /* and now the top half */ + pci_read_config_dword(dev, + pos + offsetof(struct virtio_pci_cap64, + offset_hi), &tmp32); + res_offset |= ((u64)tmp32) << 32; + pci_read_config_dword(dev, + pos + offsetof(struct virtio_pci_cap64, + length_hi), &tmp32); + res_length |= ((u64)tmp32) << 32; + + *offset = res_offset; + *len = res_length; + + return pos; + } + return 0; +} + +static bool vp_get_shm_region(struct virtio_device *vdev, + struct virtio_shm_region *region, u8 id) +{ + struct virtio_pci_device *vp_dev = to_vp_device(vdev); + struct pci_dev *pci_dev = vp_dev->pci_dev; + u8 bar; + u64 offset, len; + phys_addr_t phys_addr; + size_t bar_len; + + if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len)) { + return false; + } + + phys_addr = pci_resource_start(pci_dev, bar); + bar_len = pci_resource_len(pci_dev, bar); + + if ((offset + len) < offset) { + dev_err(&pci_dev->dev, "%s: cap offset+len overflow detected\n", + __func__); + return false; + } + + if (offset + len > bar_len) { + dev_err(&pci_dev->dev, "%s: bar shorter than cap offset+len\n", + __func__); + return false; + } + + region->len = len; + region->addr = (u64) phys_addr + offset; + + return true; +} + static const struct virtio_config_ops virtio_pci_config_nodev_ops = { .get = NULL, .set = NULL, @@ -458,6 +552,7 @@ static const struct virtio_config_ops virtio_pci_config_nodev_ops = { .bus_name = vp_bus_name, .set_vq_affinity = vp_set_vq_affinity, .get_vq_affinity = vp_get_vq_affinity, + .get_shm_region = vp_get_shm_region, }; static const struct virtio_config_ops virtio_pci_config_ops = { @@ -474,6 +569,7 @@ static const struct virtio_config_ops virtio_pci_config_ops = { .bus_name = vp_bus_name, .set_vq_affinity = vp_set_vq_affinity, .get_vq_affinity = vp_get_vq_affinity, + .get_shm_region = vp_get_shm_region, }; /** diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h index 90007a1abcab..fe9f43680a1d 100644 --- a/include/uapi/linux/virtio_pci.h +++ b/include/uapi/linux/virtio_pci.h @@ -113,6 +113,8 @@ #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* PCI configuration access */ #define VIRTIO_PCI_CAP_PCI_CFG 5 +/* Additional shared memory capability */ +#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8 /* This is the PCI capability header: */ struct virtio_pci_cap { @@ -121,11 +123,18 @@ struct virtio_pci_cap { __u8 cap_len; /* Generic PCI field: capability length */ __u8 cfg_type; /* Identifies the structure. */ __u8 bar; /* Where to find it. */ - __u8 padding[3]; /* Pad to full dword. */ + __u8 id; /* Multiple capabilities of the same type */ + __u8 padding[2]; /* Pad to full dword. */ __le32 offset; /* Offset within bar. */ __le32 length; /* Length of the structure, in bytes. */ }; +struct virtio_pci_cap64 { + struct virtio_pci_cap cap; + __le32 offset_hi; /* Most sig 32 bits of offset */ + __le32 length_hi; /* Most sig 32 bits of length */ +}; + struct virtio_pci_notify_cap { struct virtio_pci_cap cap; __le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */