Message ID | 20200812093726.10123-4-wenbin.mei@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | mmc: mediatek: add optional module reset property mmc: mediatek: add optional module reset property arm64: dts: mt7622: add reset node for mmc device Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++ arch/arm64/boot/dts/mediatek/mt7622.dtsi | | expand |
> Gesendet: Mittwoch, 12. August 2020 um 11:37 Uhr > Von: "Wenbin Mei" <wenbin.mei@mediatek.com> > Betreff: [PATCH 3/3] mmc: mediatek: add optional module reset property > This patch adds a optional reset management for msdc. > Sometimes the bootloader does not bring msdc register > to default state, so need reset the msdc controller. > > Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> Thanks for posting the fix to Mainline imho this should contain a fixes-Tag as it fixes eMMC-Access on mt7622/Bpi-R64 before we got these Errors on mounting eMMC ion R64: [ 48.664925] blk_update_request: I/O error, dev mmcblk0, sector 204800 op 0x1:(WRITE) flags 0x800 phys_seg 1 prio class 0 [ 48.676019] Buffer I/O error on dev mmcblk0p1, logical block 0, lost sync page write Fixes: 966580ad236e ("mmc: mediatek: add support for MT7622 SoC") Tested-By: Frank Wunderlich <frank-w@public-files.de> and it needs to be fixed at least for 5.4+, so adding stable-CC Cc: stable@vger.kernel.org
Thanks for your reply. I will add this in the next version. On Wed, 2020-08-12 at 12:07 +0200, Frank Wunderlich wrote: > > Gesendet: Mittwoch, 12. August 2020 um 11:37 Uhr > > Von: "Wenbin Mei" <wenbin.mei@mediatek.com> > > Betreff: [PATCH 3/3] mmc: mediatek: add optional module reset property > > > This patch adds a optional reset management for msdc. > > Sometimes the bootloader does not bring msdc register > > to default state, so need reset the msdc controller. > > > > Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> > > Thanks for posting the fix to Mainline > > imho this should contain a fixes-Tag as it fixes eMMC-Access on mt7622/Bpi-R64 > > before we got these Errors on mounting eMMC ion R64: > > [ 48.664925] blk_update_request: I/O error, dev mmcblk0, sector 204800 op 0x1:(WRITE) flags 0x800 phys_seg 1 prio class 0 > [ 48.676019] Buffer I/O error on dev mmcblk0p1, logical block 0, lost sync page write > > Fixes: 966580ad236e ("mmc: mediatek: add support for MT7622 SoC") > Tested-By: Frank Wunderlich <frank-w@public-files.de> > > and it needs to be fixed at least for 5.4+, so adding stable-CC > > Cc: stable@vger.kernel.org
On Wed, 2020-08-12 at 17:37 +0800, Wenbin Mei wrote: > This patch adds a optional reset management for msdc. > Sometimes the bootloader does not bring msdc register > to default state, so need reset the msdc controller. > > Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> > --- > drivers/mmc/host/mtk-sd.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index 39e7fc54c438..2b243c03c9b2 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -22,6 +22,7 @@ > #include <linux/slab.h> > #include <linux/spinlock.h> > #include <linux/interrupt.h> > +#include <linux/reset.h> > > #include <linux/mmc/card.h> > #include <linux/mmc/core.h> > @@ -434,6 +435,7 @@ struct msdc_host { > struct msdc_save_para save_para; /* used when gate HCLK */ > struct msdc_tune_para def_tune_para; /* default tune setting */ > struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */ > + struct reset_control *reset; > }; > > static const struct mtk_mmc_compatible mt8135_compat = { > @@ -1516,6 +1518,12 @@ static void msdc_init_hw(struct msdc_host *host) > u32 val; > u32 tune_reg = host->dev_comp->pad_tune_reg; > > + if (!IS_ERR(host->reset)) { > + reset_control_assert(host->reset); > + usleep_range(10, 50); > + reset_control_deassert(host->reset); > + } > + This should be: if (host->reset) { reset_control_assert(host->reset); usleep_range(10, 50); reset_control_deassert(host->reset); } > /* Configure to MMC/SD mode, clock free running */ > sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN); > > @@ -2273,6 +2281,11 @@ static int msdc_drv_probe(struct platform_device *pdev) > if (IS_ERR(host->src_clk_cg)) > host->src_clk_cg = NULL; > > + host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, > + "hrst"); > + if (PTR_ERR(host->reset) == -EPROBE_DEFER) > + return PTR_ERR(host->reset); > + This should be: host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "hrst"); if (IS_ERR(host->reset)) return PTR_ERR(host->reset); If the reset is configured in DT then it should be used, even if the reset driver is loaded later. If the DT does not contain the reset-names = "hrst" property at all, devm_reset_control_get_optional_*() will return NULL. With these two changes, Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> regards Philipp
Tested with these 2 changes below too. Am 12. August 2020 14:08:19 MESZ schrieb Philipp Zabel <p.zabel@pengutronix.de>: >> + if (!IS_ERR(host->reset)) { >> + reset_control_assert(host->reset); >> + usleep_range(10, 50); >> + reset_control_deassert(host->reset); >> + } >> + > >This should be: > > if (host->reset) { > reset_control_assert(host->reset); > usleep_range(10, 50); > reset_control_deassert(host->reset); > } > >> + host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, >> + "hrst"); >> + if (PTR_ERR(host->reset) == -EPROBE_DEFER) >> + return PTR_ERR(host->reset); >> + > >This should be: > > host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, > "hrst"); > if (IS_ERR(host->reset)) > return PTR_ERR(host->reset); > >With these two changes, > >Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> regards Frank
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 39e7fc54c438..2b243c03c9b2 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -22,6 +22,7 @@ #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/interrupt.h> +#include <linux/reset.h> #include <linux/mmc/card.h> #include <linux/mmc/core.h> @@ -434,6 +435,7 @@ struct msdc_host { struct msdc_save_para save_para; /* used when gate HCLK */ struct msdc_tune_para def_tune_para; /* default tune setting */ struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */ + struct reset_control *reset; }; static const struct mtk_mmc_compatible mt8135_compat = { @@ -1516,6 +1518,12 @@ static void msdc_init_hw(struct msdc_host *host) u32 val; u32 tune_reg = host->dev_comp->pad_tune_reg; + if (!IS_ERR(host->reset)) { + reset_control_assert(host->reset); + usleep_range(10, 50); + reset_control_deassert(host->reset); + } + /* Configure to MMC/SD mode, clock free running */ sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN); @@ -2273,6 +2281,11 @@ static int msdc_drv_probe(struct platform_device *pdev) if (IS_ERR(host->src_clk_cg)) host->src_clk_cg = NULL; + host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, + "hrst"); + if (PTR_ERR(host->reset) == -EPROBE_DEFER) + return PTR_ERR(host->reset); + host->irq = platform_get_irq(pdev, 0); if (host->irq < 0) { ret = -EINVAL;
This patch adds a optional reset management for msdc. Sometimes the bootloader does not bring msdc register to default state, so need reset the msdc controller. Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> --- drivers/mmc/host/mtk-sd.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)