| Message ID | 1597135057-22272-1-git-send-email-haibo.chen@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] mmc: host: sdhci-esdhc-imx: reset usdhc before sending tuning command for manual tuning method | expand |
On 11/08/20 11:37 am, haibo.chen@nxp.com wrote: > From: Haibo Chen <haibo.chen@nxp.com> > > According to IC suggestion, everytime before sending the tuning command, > need to reset the usdhc, so to reset the tuning circuit, to let every > tuning command work well for the manual tuning method. For standard > tuning method, IC already add the reset operation in the hardware logic. > > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-esdhc-imx.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index a76b4513fbec..cf335c661cc7 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -987,10 +987,20 @@ static int usdhc_execute_tuning(struct mmc_host *mmc, u32 opcode) > static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val) > { > u32 reg; > + u8 sw_rst; > + int ret; > > /* FIXME: delay a bit for card to be ready for next tuning due to errors */ > mdelay(1); > > + /* IC suggest to reset USDHC before every tuning command */ > + esdhc_clrset_le(host, 0xff, SDHCI_RESET_ALL, SDHCI_SOFTWARE_RESET); > + ret = readb_poll_timeout(host->ioaddr + SDHCI_SOFTWARE_RESET, sw_rst, > + !(sw_rst & SDHCI_RESET_ALL), 10, 100); > + if (ret == -ETIMEDOUT) > + dev_warn(mmc_dev(host->mmc), > + "warning! RESET_ALL never complete before sending tuning command\n"); > + > reg = readl(host->ioaddr + ESDHC_MIX_CTRL); > reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL | > ESDHC_MIX_CTRL_FBCLK_SEL; >
On Tue, 11 Aug 2020 at 10:42, <haibo.chen@nxp.com> wrote: > > From: Haibo Chen <haibo.chen@nxp.com> > > According to IC suggestion, everytime before sending the tuning command, > need to reset the usdhc, so to reset the tuning circuit, to let every > tuning command work well for the manual tuning method. For standard > tuning method, IC already add the reset operation in the hardware logic. > > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/sdhci-esdhc-imx.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index a76b4513fbec..cf335c661cc7 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -987,10 +987,20 @@ static int usdhc_execute_tuning(struct mmc_host *mmc, u32 opcode) > static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val) > { > u32 reg; > + u8 sw_rst; > + int ret; > > /* FIXME: delay a bit for card to be ready for next tuning due to errors */ > mdelay(1); > > + /* IC suggest to reset USDHC before every tuning command */ > + esdhc_clrset_le(host, 0xff, SDHCI_RESET_ALL, SDHCI_SOFTWARE_RESET); > + ret = readb_poll_timeout(host->ioaddr + SDHCI_SOFTWARE_RESET, sw_rst, > + !(sw_rst & SDHCI_RESET_ALL), 10, 100); > + if (ret == -ETIMEDOUT) > + dev_warn(mmc_dev(host->mmc), > + "warning! RESET_ALL never complete before sending tuning command\n"); > + > reg = readl(host->ioaddr + ESDHC_MIX_CTRL); > reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL | > ESDHC_MIX_CTRL_FBCLK_SEL; > -- > 2.17.1 >
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a76b4513fbec..cf335c661cc7 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -987,10 +987,20 @@ static int usdhc_execute_tuning(struct mmc_host *mmc, u32 opcode) static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val) { u32 reg; + u8 sw_rst; + int ret; /* FIXME: delay a bit for card to be ready for next tuning due to errors */ mdelay(1); + /* IC suggest to reset USDHC before every tuning command */ + esdhc_clrset_le(host, 0xff, SDHCI_RESET_ALL, SDHCI_SOFTWARE_RESET); + ret = readb_poll_timeout(host->ioaddr + SDHCI_SOFTWARE_RESET, sw_rst, + !(sw_rst & SDHCI_RESET_ALL), 10, 100); + if (ret == -ETIMEDOUT) + dev_warn(mmc_dev(host->mmc), + "warning! RESET_ALL never complete before sending tuning command\n"); + reg = readl(host->ioaddr + ESDHC_MIX_CTRL); reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL | ESDHC_MIX_CTRL_FBCLK_SEL;