diff mbox series

[4/4] arm: dts: owl-s500: Add RoseapplePi

Message ID 2d12521d196e2c08a30aacd0ab20d93593f94707.1592123160.git.cristian.ciocaltea@gmail.com (mailing list archive)
State New, archived
Headers show
Series Add initial support for RoseapplePi SBC | expand

Commit Message

Cristian Ciocaltea June 15, 2020, 12:19 a.m. UTC
Add a Device Tree for the RoseapplePi SBC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/Makefile                 |  1 +
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
 2 files changed, 48 insertions(+)
 create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts

Comments

Peter Korsgaard Aug. 27, 2020, 6:44 a.m. UTC | #1
>>>>> "Cristian" == Cristian Ciocaltea <cristian.ciocaltea@gmail.com> writes:

 > Add a Device Tree for the RoseapplePi SBC.
 > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>

Reviewed-by: Peter Korsgaard <peter@korsgaard.com>

On a related note: There is now an owl-mmc driver for the s900. From a
quick look at the datasheet it looks compatible with the controller on
the s500. Did you have a look at hooking that up?
Cristian Ciocaltea Aug. 27, 2020, 2:15 p.m. UTC | #2
Hi Peter,

Thanks for the review!

On Thu, Aug 27, 2020 at 08:44:40AM +0200, Peter Korsgaard wrote:
> >>>>> "Cristian" == Cristian Ciocaltea <cristian.ciocaltea@gmail.com> writes:
> 
>  > Add a Device Tree for the RoseapplePi SBC.
>  > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> 
> Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
> 
> On a related note: There is now an owl-mmc driver for the s900. From a
> quick look at the datasheet it looks compatible with the controller on
> the s500. Did you have a look at hooking that up?

Yes, please see:
https://lore.kernel.org/lkml/cover.1593124368.git.cristian.ciocaltea@gmail.com/

The clock related patches have been already applied to v5.9 and
hopefully the pinctrl driver will follow in v5.10.

> -- 
> Bye, Peter Korsgaard

Regards,
Cristi
Peter Korsgaard Aug. 27, 2020, 5:17 p.m. UTC | #3
>>>>> "Cristian" == Cristian Ciocaltea <cristian.ciocaltea@gmail.com> writes:

 > Hi Peter,
 > Thanks for the review!

 > On Thu, Aug 27, 2020 at 08:44:40AM +0200, Peter Korsgaard wrote:
 >> >>>>> "Cristian" == Cristian Ciocaltea <cristian.ciocaltea@gmail.com> writes:
 >> 
 >> > Add a Device Tree for the RoseapplePi SBC.
 >> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
 >> 
 >> Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
 >> 
 >> On a related note: There is now an owl-mmc driver for the s900. From a
 >> quick look at the datasheet it looks compatible with the controller on
 >> the s500. Did you have a look at hooking that up?

 > Yes, please see:
 > https://lore.kernel.org/lkml/cover.1593124368.git.cristian.ciocaltea@gmail.com/

 > The clock related patches have been already applied to v5.9 and
 > hopefully the pinctrl driver will follow in v5.10.

Cool, I must have missed that series Great, thanks!
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..d0712e7275da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -856,6 +856,7 @@  dtb-$(CONFIG_ARCH_ORION5X) += \
 dtb-$(CONFIG_ARCH_ACTIONS) += \
 	owl-s500-cubieboard6.dtb \
 	owl-s500-guitar-bb-rev-b.dtb \
+	owl-s500-roseapplepi.dtb \
 	owl-s500-sparky.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += \
 	prima2-evb.dtb
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
new file mode 100644
index 000000000000..c61fbaa3821e
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -0,0 +1,47 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Roseapple Pi
+ *
+ * Copyright (c) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "owl-s500.dtsi"
+
+/ {
+	compatible = "roseapplepi,roseapplepi", "actions,s500";
+	model = "Roseapple Pi";
+
+	aliases {
+		serial2 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x80000000>; /* 2GB */
+	};
+
+	uart2_clk: uart2-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <921600>;
+		#clock-cells = <0>;
+	};
+};
+
+&twd_timer {
+	status = "okay";
+};
+
+&timer {
+	clocks = <&hosc>;
+};
+
+&uart2 {
+	status = "okay";
+	clocks = <&uart2_clk>;
+};