| Message ID | 1598113021-4149-2-git-send-email-mkshah@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | irqchip: qcom: pdc: Introduce irq_set_wake call | expand |
On Sat 22 Aug 16:16 UTC 2020, Maulik Shah wrote: > Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during > suspend and mask before setting irq type. > > Masking before changing type should make sure any spurious interrupt is not > detected during this operation. > This seems like two different problems and both descriptions are thin on details imho. If you're respinning the series I would appreciate if you improved this. Otherwise Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Acked-by: Linus Walleij <linus.walleij@linaro.org> > Reviewed-by: Douglas Anderson <dianders@chromium.org> > Signed-off-by: Maulik Shah <mkshah@codeaurora.org> > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index a2567e7..1c23f5c 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -1243,6 +1243,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; > pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; > pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; > + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND | > + IRQCHIP_SET_TYPE_MASKED; > > np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); > if (np) { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index a2567e7..1c23f5c 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1243,6 +1243,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND | + IRQCHIP_SET_TYPE_MASKED; np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); if (np) {
Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during suspend and mask before setting irq type. Masking before changing type should make sure any spurious interrupt is not detected during this operation. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ 1 file changed, 2 insertions(+)