Message ID | 20200814024114.1177553-8-robdclark@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | None | expand |
On Thu, Aug 13, 2020 at 07:41:02PM -0700, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > This will be populated by adreno-smmu, to provide a way for coordinating > enabling/disabling TTBR0 translation. > Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 2 -- > drivers/gpu/drm/msm/msm_gpu.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.h | 6 +++++- > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > index 26664e1b30c0..58e03b20e1c7 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > @@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) > return PTR_ERR(gpu); > } > > - dev_set_drvdata(dev, gpu); > - > return 0; > } > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 6aa9e04e52e7..806eb0957280 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -892,7 +892,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > gpu->gpu_cx = NULL; > > gpu->pdev = pdev; > - platform_set_drvdata(pdev, gpu); > + platform_set_drvdata(pdev, &gpu->adreno_smmu); > > msm_devfreq_init(gpu); > > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 8bda7beaed4b..f91b141add75 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -7,6 +7,7 @@ > #ifndef __MSM_GPU_H__ > #define __MSM_GPU_H__ > > +#include <linux/adreno-smmu-priv.h> > #include <linux/clk.h> > #include <linux/interconnect.h> > #include <linux/pm_opp.h> > @@ -73,6 +74,8 @@ struct msm_gpu { > struct platform_device *pdev; > const struct msm_gpu_funcs *funcs; > > + struct adreno_smmu_priv adreno_smmu; > + > /* performance counters (hw & sw): */ > spinlock_t perf_lock; > bool perfcntr_active; > @@ -143,7 +146,8 @@ struct msm_gpu { > > static inline struct msm_gpu *dev_to_gpu(struct device *dev) > { > - return dev_get_drvdata(dev); > + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); > + return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); > } > > /* It turns out that all targets use the same ringbuffer size */ > -- > 2.26.2 >
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > This will be populated by adreno-smmu, to provide a way for coordinating > enabling/disabling TTBR0 translation. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 2 -- > drivers/gpu/drm/msm/msm_gpu.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.h | 6 +++++- > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > index 26664e1b30c0..58e03b20e1c7 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > @@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) > return PTR_ERR(gpu); > } > > - dev_set_drvdata(dev, gpu); > - > return 0; > } > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 6aa9e04e52e7..806eb0957280 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -892,7 +892,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > gpu->gpu_cx = NULL; > > gpu->pdev = pdev; > - platform_set_drvdata(pdev, gpu); > + platform_set_drvdata(pdev, &gpu->adreno_smmu); > > msm_devfreq_init(gpu); > > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 8bda7beaed4b..f91b141add75 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -7,6 +7,7 @@ > #ifndef __MSM_GPU_H__ > #define __MSM_GPU_H__ > > +#include <linux/adreno-smmu-priv.h> > #include <linux/clk.h> > #include <linux/interconnect.h> > #include <linux/pm_opp.h> > @@ -73,6 +74,8 @@ struct msm_gpu { > struct platform_device *pdev; > const struct msm_gpu_funcs *funcs; > > + struct adreno_smmu_priv adreno_smmu; > + > /* performance counters (hw & sw): */ > spinlock_t perf_lock; > bool perfcntr_active; > @@ -143,7 +146,8 @@ struct msm_gpu { > > static inline struct msm_gpu *dev_to_gpu(struct device *dev) > { > - return dev_get_drvdata(dev); > + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); > + return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); > } > > /* It turns out that all targets use the same ringbuffer size */ > -- > 2.26.2 >
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 26664e1b30c0..58e03b20e1c7 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return PTR_ERR(gpu); } - dev_set_drvdata(dev, gpu); - return 0; } diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 6aa9e04e52e7..806eb0957280 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -892,7 +892,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, gpu->gpu_cx = NULL; gpu->pdev = pdev; - platform_set_drvdata(pdev, gpu); + platform_set_drvdata(pdev, &gpu->adreno_smmu); msm_devfreq_init(gpu); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 8bda7beaed4b..f91b141add75 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -7,6 +7,7 @@ #ifndef __MSM_GPU_H__ #define __MSM_GPU_H__ +#include <linux/adreno-smmu-priv.h> #include <linux/clk.h> #include <linux/interconnect.h> #include <linux/pm_opp.h> @@ -73,6 +74,8 @@ struct msm_gpu { struct platform_device *pdev; const struct msm_gpu_funcs *funcs; + struct adreno_smmu_priv adreno_smmu; + /* performance counters (hw & sw): */ spinlock_t perf_lock; bool perfcntr_active; @@ -143,7 +146,8 @@ struct msm_gpu { static inline struct msm_gpu *dev_to_gpu(struct device *dev) { - return dev_get_drvdata(dev); + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); + return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); } /* It turns out that all targets use the same ringbuffer size */