| Message ID | 20200914050052.3974-3-stanley.chu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | scsi: ufs-mediatek: Support performance mode for inline encryption engine | expand |
On Mon, 14 Sep 2020 13:00:52 +0800, Stanley Chu wrote: > Add "mediatek,mt8192-ufshci" compatible string to for MediaTek > UFS host controller present on MT8192 chipsets. > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > --- > Documentation/devicetree/bindings/ufs/ufs-mediatek.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt index 72aab8547308..63a953b672d2 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt +++ b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt @@ -9,7 +9,9 @@ contain a phandle reference to UFS M-PHY node. Required properties for UFS nodes: - compatible : Compatible list, contains the following controller: "mediatek,mt8183-ufshci" for MediaTek UFS host controller - present on MT81xx chipsets. + present on MT8183 chipsets. + "mediatek,mt8192-ufshci" for MediaTek UFS host controller + present on MT8192 chipsets. - reg : Address and length of the UFS register set. - phys : phandle to m-phy. - clocks : List of phandle and clock specifier pairs.
Add "mediatek,mt8192-ufshci" compatible string to for MediaTek UFS host controller present on MT8192 chipsets. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> --- Documentation/devicetree/bindings/ufs/ufs-mediatek.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)