| Message ID | 20200918101852.582559-1-jean-philippe@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | iommu: Shared Virtual Addressing for SMMUv3 (PT sharing part) | expand |
On Fri, 18 Sep 2020 12:18:40 +0200 Jean-Philippe Brucker <jean-philippe@linaro.org> wrote: > This is version 10 of the page table sharing support for Arm SMMUv3. > Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do > not depend on it, and could get merged for v5.10 regardless. Hi Jean-Philippe, It's been a rather long time since I last looked at this stuff (about v4 I think!), but I just had a read through this set and they all look good to me. FWIW: Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Thanks, Jonathan > > v10: > * Fix patches 3, 8, 9 and 10 following Eric's review. > > v9 resend: https://lore.kernel.org/linux-iommu/20200817171558.325917-1-jean-philippe@linaro.org/ > * Rebased onto v5.9-rc1. Moved to drivers/iommu/arm/arm-smmu-v3/ as a > result. > > v9: https://lore.kernel.org/linux-iommu/20200723145724.3014766-1-jean-philippe@linaro.org/ > * Moved most of the SVA code to arm-smmu-v3-sva.c. This required moving > struct definitions and macros to arm-smmu-v3.h (patch 7), hence the > new 700 insertions/deletions in the diffstat. > * Updated patches 4 and 8 following review. > * Fixed a bug when replacing a private ASID. > > v8: https://lore.kernel.org/linux-iommu/20200618155125.1548969-1-jean-philippe@linaro.org/ > * Split SVA series into three parts: page table sharing, I/O page > faults, and additional features (DVM, VHE and HTTU). > > Fenghua Yu (1): > mm: Define pasid in mm > > Jean-Philippe Brucker (12): > iommu/ioasid: Add ioasid references > iommu/sva: Add PASID helpers > arm64: mm: Pin down ASIDs for sharing mm with devices > iommu/io-pgtable-arm: Move some definitions to a header > arm64: cpufeature: Export symbol read_sanitised_ftr_reg() > iommu/arm-smmu-v3: Move definitions to a header > iommu/arm-smmu-v3: Share process page tables > iommu/arm-smmu-v3: Seize private ASID > iommu/arm-smmu-v3: Check for SVA features > iommu/arm-smmu-v3: Add SVA device feature > iommu/arm-smmu-v3: Implement iommu_sva_bind/unbind() > iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops > > drivers/iommu/Kconfig | 17 + > drivers/iommu/Makefile | 1 + > drivers/iommu/arm/arm-smmu-v3/Makefile | 5 +- > arch/arm64/include/asm/mmu.h | 3 + > arch/arm64/include/asm/mmu_context.h | 11 +- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 752 +++++++++++++++ > drivers/iommu/io-pgtable-arm.h | 30 + > drivers/iommu/iommu-sva-lib.h | 15 + > include/linux/ioasid.h | 10 +- > include/linux/mm_types.h | 4 + > arch/arm64/kernel/cpufeature.c | 1 + > arch/arm64/mm/context.c | 105 ++- > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 488 ++++++++++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 860 ++++-------------- > drivers/iommu/intel/iommu.c | 4 +- > drivers/iommu/intel/svm.c | 6 +- > drivers/iommu/io-pgtable-arm.c | 27 +- > drivers/iommu/ioasid.c | 38 +- > drivers/iommu/iommu-sva-lib.c | 86 ++ > MAINTAINERS | 3 +- > 20 files changed, 1731 insertions(+), 735 deletions(-) > create mode 100644 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > create mode 100644 drivers/iommu/io-pgtable-arm.h > create mode 100644 drivers/iommu/iommu-sva-lib.h > create mode 100644 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > create mode 100644 drivers/iommu/iommu-sva-lib.c >
Hi Will, On Fri, Sep 18, 2020 at 12:18:40PM +0200, Jean-Philippe Brucker wrote: > This is version 10 of the page table sharing support for Arm SMMUv3. > Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do > not depend on it, and could get merged for v5.10 regardless. Are you OK with taking patches 4-11 for v5.10? The rest depends on patch 1 which hasn't been acked yet. It's uncontroversial and I'm sure it will eventually make it. In case it doesn't, we'll keep track of mm->pasid within the IOMMU subsystem instead. Thanks, Jean
Hi Jean-Philippe, On Mon, Sep 28, 2020 at 06:47:31PM +0200, Jean-Philippe Brucker wrote: > On Fri, Sep 18, 2020 at 12:18:40PM +0200, Jean-Philippe Brucker wrote: > > This is version 10 of the page table sharing support for Arm SMMUv3. > > Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do > > not depend on it, and could get merged for v5.10 regardless. > > Are you OK with taking patches 4-11 for v5.10? > > The rest depends on patch 1 which hasn't been acked yet. It's > uncontroversial and I'm sure it will eventually make it. In case it > doesn't, we'll keep track of mm->pasid within the IOMMU subsystem instead. I was off most of last week, but I plan to see how much of this I can queue tonight. Stay tuned... Will
On Mon, Sep 28, 2020 at 06:23:15PM +0100, Will Deacon wrote: > On Mon, Sep 28, 2020 at 06:47:31PM +0200, Jean-Philippe Brucker wrote: > > On Fri, Sep 18, 2020 at 12:18:40PM +0200, Jean-Philippe Brucker wrote: > > > This is version 10 of the page table sharing support for Arm SMMUv3. > > > Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do > > > not depend on it, and could get merged for v5.10 regardless. > > > > Are you OK with taking patches 4-11 for v5.10? > > > > The rest depends on patch 1 which hasn't been acked yet. It's > > uncontroversial and I'm sure it will eventually make it. In case it > > doesn't, we'll keep track of mm->pasid within the IOMMU subsystem instead. > > I was off most of last week, but I plan to see how much of this I can queue > tonight. Stay tuned... I've queued 4-11 locally, but I've put 4 and 6 on a shared branch with arm64 (for-next/svm) so I'd like that to hit next before I push out the merge into the branch for Joerg. Will
On Mon, Sep 28, 2020 at 11:39:02PM +0100, Will Deacon wrote: > On Mon, Sep 28, 2020 at 06:23:15PM +0100, Will Deacon wrote: > > On Mon, Sep 28, 2020 at 06:47:31PM +0200, Jean-Philippe Brucker wrote: > > > On Fri, Sep 18, 2020 at 12:18:40PM +0200, Jean-Philippe Brucker wrote: > > > > This is version 10 of the page table sharing support for Arm SMMUv3. > > > > Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do > > > > not depend on it, and could get merged for v5.10 regardless. > > > > > > Are you OK with taking patches 4-11 for v5.10? > > > > > > The rest depends on patch 1 which hasn't been acked yet. It's > > > uncontroversial and I'm sure it will eventually make it. In case it > > > doesn't, we'll keep track of mm->pasid within the IOMMU subsystem instead. > > > > I was off most of last week, but I plan to see how much of this I can queue > > tonight. Stay tuned... > > I've queued 4-11 locally, but I've put 4 and 6 on a shared branch with arm64 > (for-next/svm) so I'd like that to hit next before I push out the merge into > the branch for Joerg. Great, thanks! I'll split the remainder into two or three small series Thanks, Jean