diff mbox series

[4/6] ARM: dts: imx6ul: segin: Add phyBOARD-Segin with eMMC phyCORE-i.MX6UL

Message ID 20200922092313.151293-4-s.riedmueller@phytec.de (mailing list archive)
State New, archived
Headers show
Series [1/6] ARM: dts: imx6ul: segin: Fix stmpe touchscreen subnode name | expand

Commit Message

Stefan Riedmüller Sept. 22, 2020, 9:23 a.m. UTC
From: Yunus Bas <y.bas@phytec.de>

Add a PHYTEC phyBOARD-Segin full featured with phyCORE-i.MX 6UL with
eMMC and following features:
    - i.MX 6UL
    - 512 MB RAM
    - eMMC
    - USB Host/OTG
    - 2x 100 Mbit/s Ethernet
    - RS232
    - CAN

Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
---
 arch/arm/boot/dts/Makefile                    |  1 +
 .../dts/imx6ul-phytec-segin-ff-rdk-emmc.dts   | 93 +++++++++++++++++++
 2 files changed, 94 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts

Comments

Shawn Guo Oct. 28, 2020, 8:46 a.m. UTC | #1
On Tue, Sep 22, 2020 at 11:23:11AM +0200, Stefan Riedmueller wrote:
> From: Yunus Bas <y.bas@phytec.de>
> 
> Add a PHYTEC phyBOARD-Segin full featured with phyCORE-i.MX 6UL with
> eMMC and following features:
>     - i.MX 6UL
>     - 512 MB RAM
>     - eMMC
>     - USB Host/OTG
>     - 2x 100 Mbit/s Ethernet
>     - RS232
>     - CAN
> 
> Signed-off-by: Yunus Bas <y.bas@phytec.de>
> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
> ---
>  arch/arm/boot/dts/Makefile                    |  1 +
>  .../dts/imx6ul-phytec-segin-ff-rdk-emmc.dts   | 93 +++++++++++++++++++
>  2 files changed, 94 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4572db3fa5ae..81ede0707a51 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -615,6 +615,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
>  	imx6ul-pico-dwarf.dtb \
>  	imx6ul-pico-hobbit.dtb \
>  	imx6ul-pico-pi.dtb \
> +	imx6ul-phytec-segin-ff-rdk-emmc.dtb \
>  	imx6ul-phytec-segin-ff-rdk-nand.dtb \
>  	imx6ul-tx6ul-0010.dtb \
>  	imx6ul-tx6ul-0011.dtb \
> diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
> new file mode 100644
> index 000000000000..934c05fad615
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
> @@ -0,0 +1,93 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
> +/*
> + * Copyright (C) 2020 PHYTEC Messtechnik GmbH
> + * Author: Yunus Bas <y.bas@phytec.de>
> + */
> +
> +/dts-v1/;
> +#include "imx6ul.dtsi"
> +#include "imx6ul-phytec-phycore-som.dtsi"
> +#include "imx6ul-phytec-segin.dtsi"
> +#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
> +
> +/ {
> +	model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
> +	compatible = "phytec,imx6ul-pbacd10-emmc", "phytec,imx6ul-pbacd10",
> +		     "phytec,imx6ul-pcl063","fsl,imx6ul";
> +};
> +
> +&adc1 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&tlv320 {
> +	status = "okay";
> +};

It breaks the alphabetic order.

Shawn

> +
> +&ecspi3 {
> +	status = "okay";
> +};
> +
> +&ethphy1 {
> +	status = "okay";
> +};
> +
> +&ethphy2 {
> +	status = "okay";
> +};
> +
> +&fec1 {
> +	status = "okay";
> +};
> +
> +&fec2 {
> +	status = "okay";
> +};
> +
> +&i2c_rtc {
> +	status = "okay";
> +};
> +
> +&reg_can1_en {
> +	status = "okay";
> +};
> +
> +&reg_sound_1v8 {
> +	status = "okay";
> +};
> +
> +&reg_sound_3v3 {
> +	status = "okay";
> +};
> +
> +&sai2 {
> +	status = "okay";
> +};
> +
> +&sound {
> +	status = "okay";
> +};
> +
> +&uart5 {
> +	status = "okay";
> +};
> +
> +&usbotg1 {
> +	status = "okay";
> +};
> +
> +&usbotg2 {
> +	status = "okay";
> +};
> +
> +&usdhc1 {
> +	status = "okay";
> +};
> +
> +&usdhc2 {
> +	status = "okay";
> +};
> -- 
> 2.25.1
>
Stefan Riedmüller Oct. 28, 2020, 8:55 a.m. UTC | #2
Hi Shawn,

On 28.10.20 09:46, Shawn Guo wrote:
> On Tue, Sep 22, 2020 at 11:23:11AM +0200, Stefan Riedmueller wrote:
>> From: Yunus Bas <y.bas@phytec.de>
>>
>> Add a PHYTEC phyBOARD-Segin full featured with phyCORE-i.MX 6UL with
>> eMMC and following features:
>>      - i.MX 6UL
>>      - 512 MB RAM
>>      - eMMC
>>      - USB Host/OTG
>>      - 2x 100 Mbit/s Ethernet
>>      - RS232
>>      - CAN
>>
>> Signed-off-by: Yunus Bas <y.bas@phytec.de>
>> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
>> ---
>>   arch/arm/boot/dts/Makefile                    |  1 +
>>   .../dts/imx6ul-phytec-segin-ff-rdk-emmc.dts   | 93 +++++++++++++++++++
>>   2 files changed, 94 insertions(+)
>>   create mode 100644 arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 4572db3fa5ae..81ede0707a51 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -615,6 +615,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
>>   	imx6ul-pico-dwarf.dtb \
>>   	imx6ul-pico-hobbit.dtb \
>>   	imx6ul-pico-pi.dtb \
>> +	imx6ul-phytec-segin-ff-rdk-emmc.dtb \
>>   	imx6ul-phytec-segin-ff-rdk-nand.dtb \
>>   	imx6ul-tx6ul-0010.dtb \
>>   	imx6ul-tx6ul-0011.dtb \
>> diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
>> new file mode 100644
>> index 000000000000..934c05fad615
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
>> @@ -0,0 +1,93 @@
>> +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
>> +/*
>> + * Copyright (C) 2020 PHYTEC Messtechnik GmbH
>> + * Author: Yunus Bas <y.bas@phytec.de>
>> + */
>> +
>> +/dts-v1/;
>> +#include "imx6ul.dtsi"
>> +#include "imx6ul-phytec-phycore-som.dtsi"
>> +#include "imx6ul-phytec-segin.dtsi"
>> +#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
>> +
>> +/ {
>> +	model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
>> +	compatible = "phytec,imx6ul-pbacd10-emmc", "phytec,imx6ul-pbacd10",
>> +		     "phytec,imx6ul-pcl063","fsl,imx6ul";
>> +};
>> +
>> +&adc1 {
>> +	status = "okay";
>> +};
>> +
>> +&can1 {
>> +	status = "okay";
>> +};
>> +
>> +&tlv320 {
>> +	status = "okay";
>> +};
> 
> It breaks the alphabetic order.

Ah sorry, I missed that. I'll send a v2.

Thanks,
Stefan

> 
> Shawn
> 
>> +
>> +&ecspi3 {
>> +	status = "okay";
>> +};
>> +
>> +&ethphy1 {
>> +	status = "okay";
>> +};
>> +
>> +&ethphy2 {
>> +	status = "okay";
>> +};
>> +
>> +&fec1 {
>> +	status = "okay";
>> +};
>> +
>> +&fec2 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c_rtc {
>> +	status = "okay";
>> +};
>> +
>> +&reg_can1_en {
>> +	status = "okay";
>> +};
>> +
>> +&reg_sound_1v8 {
>> +	status = "okay";
>> +};
>> +
>> +&reg_sound_3v3 {
>> +	status = "okay";
>> +};
>> +
>> +&sai2 {
>> +	status = "okay";
>> +};
>> +
>> +&sound {
>> +	status = "okay";
>> +};
>> +
>> +&uart5 {
>> +	status = "okay";
>> +};
>> +
>> +&usbotg1 {
>> +	status = "okay";
>> +};
>> +
>> +&usbotg2 {
>> +	status = "okay";
>> +};
>> +
>> +&usdhc1 {
>> +	status = "okay";
>> +};
>> +
>> +&usdhc2 {
>> +	status = "okay";
>> +};
>> -- 
>> 2.25.1
>>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4572db3fa5ae..81ede0707a51 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -615,6 +615,7 @@  dtb-$(CONFIG_SOC_IMX6UL) += \
 	imx6ul-pico-dwarf.dtb \
 	imx6ul-pico-hobbit.dtb \
 	imx6ul-pico-pi.dtb \
+	imx6ul-phytec-segin-ff-rdk-emmc.dtb \
 	imx6ul-phytec-segin-ff-rdk-nand.dtb \
 	imx6ul-tx6ul-0010.dtb \
 	imx6ul-tx6ul-0011.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
new file mode 100644
index 000000000000..934c05fad615
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
@@ -0,0 +1,93 @@ 
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2020 PHYTEC Messtechnik GmbH
+ * Author: Yunus Bas <y.bas@phytec.de>
+ */
+
+/dts-v1/;
+#include "imx6ul.dtsi"
+#include "imx6ul-phytec-phycore-som.dtsi"
+#include "imx6ul-phytec-segin.dtsi"
+#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
+
+/ {
+	model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
+	compatible = "phytec,imx6ul-pbacd10-emmc", "phytec,imx6ul-pbacd10",
+		     "phytec,imx6ul-pcl063","fsl,imx6ul";
+};
+
+&adc1 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&tlv320 {
+	status = "okay";
+};
+
+&ecspi3 {
+	status = "okay";
+};
+
+&ethphy1 {
+	status = "okay";
+};
+
+&ethphy2 {
+	status = "okay";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&fec2 {
+	status = "okay";
+};
+
+&i2c_rtc {
+	status = "okay";
+};
+
+&reg_can1_en {
+	status = "okay";
+};
+
+&reg_sound_1v8 {
+	status = "okay";
+};
+
+&reg_sound_3v3 {
+	status = "okay";
+};
+
+&sai2 {
+	status = "okay";
+};
+
+&sound {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&usdhc2 {
+	status = "okay";
+};