Message ID | 1604432073-15933-3-git-send-email-anitha.chrisanthus@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for KeemBay DRM driver | expand |
Hi Anitha. On Tue, Nov 03, 2020 at 11:34:28AM -0800, Anitha Chrisanthus wrote: > This patch add bindings for Intel KeemBay MSSCAM syscon > > Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com> > Cc: Sam Ravnborg <sam@ravnborg.org> > Cc: Neil Armstrong <narmstrong@baylibre.com> > Cc: Rob Herring <robh@kernel.org> > --- > .../bindings/display/intel,keembay-msscam.yaml | 36 ++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml > > diff --git a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml > new file mode 100644 > index 0000000..10ed8d5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml > @@ -0,0 +1,36 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Devicetree bindings for Intel Keem Bay MSSCAM Here I had expected a short description of what it is used for. And maybe even an explanation for the msscam abbrevation it this can be made public. > + > +maintainers: > + - Anitha Chrisanthus <anitha.chrisanthus@intel.com> > + - Edmond J Dea <edmund.j.dea@intel.com> > + > +properties: > + compatible: > + const: intel,keembay-msscam, syscon This will not work - it needs to look something like: compatible: items: - const: intel,keembay-msscam - const: syscon See for example arm/freescale/fsl,imx7ulp-sim.yaml Other than the above it looks good. Sam > + > + reg: > + maxItems: 1 > + > + reg-io-width: > + const: 4 > + > +required: > + - compatible > + - reg > + - reg-io-width > + > +additionalProperties: false > + > +examples: > + - | > + msscam:msscam@20910000 { > + compatible = "intel,keembay-msscam", "syscon"; > + reg = <0x20910000 0x30>; > + reg-io-width = <4>; > + }; > -- > 2.7.4
diff --git a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml new file mode 100644 index 0000000..10ed8d5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Devicetree bindings for Intel Keem Bay MSSCAM + +maintainers: + - Anitha Chrisanthus <anitha.chrisanthus@intel.com> + - Edmond J Dea <edmund.j.dea@intel.com> + +properties: + compatible: + const: intel,keembay-msscam, syscon + + reg: + maxItems: 1 + + reg-io-width: + const: 4 + +required: + - compatible + - reg + - reg-io-width + +additionalProperties: false + +examples: + - | + msscam:msscam@20910000 { + compatible = "intel,keembay-msscam", "syscon"; + reg = <0x20910000 0x30>; + reg-io-width = <4>; + };
This patch add bindings for Intel KeemBay MSSCAM syscon Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Herring <robh@kernel.org> --- .../bindings/display/intel,keembay-msscam.yaml | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml