Message ID | 20201103074436.93790-1-alexandru.ardelean@analog.com (mailing list archive) |
---|---|
State | Not Applicable |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | [net-next,v2,1/2,RESEND] net: phy: adin: disable diag clock & disable standby mode in config_aneg | expand |
On Tue, 3 Nov 2020 09:44:35 +0200 Alexandru Ardelean wrote: > When the PHY powers up, the diagnostics clock isn't enabled (bit 2 in > register PHY_CTRL_1 (0x0012)). > Also, the PHY is not in standby mode, so bit 13 in PHY_CTRL_3 (0x0017) is > always set at power up. > > The standby mode and the diagnostics clock are both meant to be for the > cable diagnostics feature of the PHY (in phylib this would be equivalent to > the cable-test support), and for the frame-generator feature of the PHY. > > In standby mode, the PHY doesn't negotiate links or manage links. > > To use the cable diagnostics/test (or frame-generator), the PHY must be > first set in standby mode, so that the link operation doesn't interfere. > Then, the diagnostics clock must be enabled. > > For the cable-test feature, when the operation finishes, the PHY goes into > PHY_UP state, and the config_aneg hook is called. > > For the ADIN PHY, we need to make sure that during autonegotiation > configuration/setup the PHY is removed from standby mode and the > diagnostics clock is disabled, so that normal operation is resumed. > > This change does that by moving the set of the ADIN1300_LINKING_EN bit (2) > in the config_aneg (to disable standby mode). > Previously, this was set in the downshift setup, because the downshift > retry value and the ADIN1300_LINKING_EN are in the same register. > > And the ADIN1300_DIAG_CLK_EN bit (13) is cleared, to disable the > diagnostics clock. > > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Applied both, thanks.
diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index 5bc3926c52f0..619d36685b5d 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -23,6 +23,7 @@ #define ADIN1300_PHY_CTRL1 0x0012 #define ADIN1300_AUTO_MDI_EN BIT(10) #define ADIN1300_MAN_MDIX_EN BIT(9) +#define ADIN1300_DIAG_CLK_EN BIT(2) #define ADIN1300_RX_ERR_CNT 0x0014 @@ -326,10 +327,9 @@ static int adin_set_downshift(struct phy_device *phydev, u8 cnt) return -E2BIG; val = FIELD_PREP(ADIN1300_DOWNSPEED_RETRIES_MSK, cnt); - val |= ADIN1300_LINKING_EN; rc = phy_modify(phydev, ADIN1300_PHY_CTRL3, - ADIN1300_LINKING_EN | ADIN1300_DOWNSPEED_RETRIES_MSK, + ADIN1300_DOWNSPEED_RETRIES_MSK, val); if (rc < 0) return rc; @@ -560,6 +560,14 @@ static int adin_config_aneg(struct phy_device *phydev) { int ret; + ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN); + if (ret < 0) + return ret; + + ret = phy_set_bits(phydev, ADIN1300_PHY_CTRL3, ADIN1300_LINKING_EN); + if (ret < 0) + return ret; + ret = adin_config_mdix(phydev); if (ret) return ret;