| Message ID | 20201110144207.90693-3-nikos.nikoleris@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm: MMU extentions to enable litmus7 | expand |
Hi Nikos, On 11/10/20 2:42 PM, Nikos Nikoleris wrote: > Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> > Reviewed-by: Andrew Jones <drjones@redhat.com> > --- > lib/arm64/asm/pgtable-hwdef.h | 2 ++ > arm/cstart64.S | 6 +++++- > 2 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/lib/arm64/asm/pgtable-hwdef.h b/lib/arm64/asm/pgtable-hwdef.h > index c31bc11..48a1d1a 100644 > --- a/lib/arm64/asm/pgtable-hwdef.h > +++ b/lib/arm64/asm/pgtable-hwdef.h > @@ -153,5 +153,7 @@ > #define MT_DEVICE_GRE 2 > #define MT_NORMAL_NC 3 /* writecombine */ > #define MT_NORMAL 4 > +#define MT_NORMAL_WT 5 > +#define MT_DEVICE_nGRE 6 > > #endif /* _ASMARM64_PGTABLE_HWDEF_H_ */ > diff --git a/arm/cstart64.S b/arm/cstart64.S > index 6610779..0428014 100644 > --- a/arm/cstart64.S > +++ b/arm/cstart64.S > @@ -154,6 +154,8 @@ halt: > * DEVICE_GRE 010 00001100 > * NORMAL_NC 011 01000100 > * NORMAL 100 11111111 > + * NORMAL_WT 101 10111011 > + * DEVICE_nGRE 110 00001000 > */ > #define MAIR(attr, mt) ((attr) << ((mt) * 8)) > > @@ -184,7 +186,9 @@ asm_mmu_enable: > MAIR(0x04, MT_DEVICE_nGnRE) | \ > MAIR(0x0c, MT_DEVICE_GRE) | \ > MAIR(0x44, MT_NORMAL_NC) | \ > - MAIR(0xff, MT_NORMAL) > + MAIR(0xff, MT_NORMAL) | \ > + MAIR(0xbb, MT_NORMAL_WT) | \ > + MAIR(0x08, MT_DEVICE_nGRE) Compared the values with ARM DDI 0487F.b, pages D13-333{5,6}. 0xbb matches Normal memory, Inner and Outer Write-Through Non-transient (where RW=0b11). 0x08 matches with Device nGRE memory: Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Thanks, Alex
diff --git a/lib/arm64/asm/pgtable-hwdef.h b/lib/arm64/asm/pgtable-hwdef.h index c31bc11..48a1d1a 100644 --- a/lib/arm64/asm/pgtable-hwdef.h +++ b/lib/arm64/asm/pgtable-hwdef.h @@ -153,5 +153,7 @@ #define MT_DEVICE_GRE 2 #define MT_NORMAL_NC 3 /* writecombine */ #define MT_NORMAL 4 +#define MT_NORMAL_WT 5 +#define MT_DEVICE_nGRE 6 #endif /* _ASMARM64_PGTABLE_HWDEF_H_ */ diff --git a/arm/cstart64.S b/arm/cstart64.S index 6610779..0428014 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -154,6 +154,8 @@ halt: * DEVICE_GRE 010 00001100 * NORMAL_NC 011 01000100 * NORMAL 100 11111111 + * NORMAL_WT 101 10111011 + * DEVICE_nGRE 110 00001000 */ #define MAIR(attr, mt) ((attr) << ((mt) * 8)) @@ -184,7 +186,9 @@ asm_mmu_enable: MAIR(0x04, MT_DEVICE_nGnRE) | \ MAIR(0x0c, MT_DEVICE_GRE) | \ MAIR(0x44, MT_NORMAL_NC) | \ - MAIR(0xff, MT_NORMAL) + MAIR(0xff, MT_NORMAL) | \ + MAIR(0xbb, MT_NORMAL_WT) | \ + MAIR(0x08, MT_DEVICE_nGRE) msr mair_el1, x1 /* TTBR0 */