diff mbox series

[PATCHv1,4/4] fpga: stratix10-soc: entend driver for bitstream authentication

Message ID 1605204403-6663-5-git-send-email-richard.gong@linux.intel.com (mailing list archive)
State Superseded, archived
Headers show
Series Extend FPGA manager and region drivers for | expand

Commit Message

Richard Gong Nov. 12, 2020, 6:06 p.m. UTC 
From: Richard Gong <richard.gong@intel.com>

Exten FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.

Signed-off-by: Richard Gong <richard.gong@intel.com>
---
 drivers/fpga/stratix10-soc.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Tom Rix Nov. 13, 2020, 8:31 p.m. UTC | #1 
On 11/12/20 10:06 AM, richard.gong@linux.intel.com wrote:
> From: Richard Gong <richard.gong@intel.com>
>
> Exten FPGA manager driver to support FPGA bitstream authentication on
> Intel SocFPGA platforms.
>
> Signed-off-by: Richard Gong <richard.gong@intel.com>
> ---
>  drivers/fpga/stratix10-soc.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
> index 657a70c..8a59365 100644
> --- a/drivers/fpga/stratix10-soc.c
> +++ b/drivers/fpga/stratix10-soc.c
> @@ -185,7 +185,10 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
>  	ctype.flags = 0;
>  	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
>  		dev_dbg(dev, "Requesting partial reconfiguration.\n");
> -		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
> +		ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG;

The change does not match the commit log.

Add some comment like..

'Cleanup setting of partial reconfig flag'

to cover the change.

Tom

> +	} else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) {
> +		dev_dbg(dev, "Requesting bitstream authentication.\n");
> +		ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION;
>  	} else {
>  		dev_dbg(dev, "Requesting full reconfiguration.\n");
>  	}
Richard Gong Nov. 14, 2020, 2:55 p.m. UTC | #2 
Hi Tom.

On 11/13/20 2:31 PM, Tom Rix wrote:
> 
> On 11/12/20 10:06 AM, richard.gong@linux.intel.com wrote:
>> From: Richard Gong <richard.gong@intel.com>
>>
>> Exten FPGA manager driver to support FPGA bitstream authentication on
>> Intel SocFPGA platforms.
>>
>> Signed-off-by: Richard Gong <richard.gong@intel.com>
>> ---
>>   drivers/fpga/stratix10-soc.c | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
>> index 657a70c..8a59365 100644
>> --- a/drivers/fpga/stratix10-soc.c
>> +++ b/drivers/fpga/stratix10-soc.c
>> @@ -185,7 +185,10 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
>>   	ctype.flags = 0;
>>   	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
>>   		dev_dbg(dev, "Requesting partial reconfiguration.\n");
>> -		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
>> +		ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG;
> 
> The change does not match the commit log.
> 
> Add some comment like..
> 
> 'Cleanup setting of partial reconfig flag'
> 
> to cover the change.

I will make the cleanup change separately in a different patch.

Regards,
Richard


> 
> Tom
> 
>> +	} else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) {
>> +		dev_dbg(dev, "Requesting bitstream authentication.\n");
>> +		ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION;
>>   	} else {
>>   		dev_dbg(dev, "Requesting full reconfiguration.\n");
>>   	}
>
Moritz Fischer Nov. 15, 2020, 7:19 p.m. UTC | #3 
On Thu, Nov 12, 2020 at 12:06:43PM -0600, richard.gong@linux.intel.com wrote:
> From: Richard Gong <richard.gong@intel.com>
> 
> Exten FPGA manager driver to support FPGA bitstream authentication on
Nit: Extend
> Intel SocFPGA platforms.
> 
> Signed-off-by: Richard Gong <richard.gong@intel.com>
> ---
>  drivers/fpga/stratix10-soc.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
> index 657a70c..8a59365 100644
> --- a/drivers/fpga/stratix10-soc.c
> +++ b/drivers/fpga/stratix10-soc.c
> @@ -185,7 +185,10 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
>  	ctype.flags = 0;
>  	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
>  		dev_dbg(dev, "Requesting partial reconfiguration.\n");
> -		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
> +		ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG;
I think we had this discussion during the original review of the
stratix10-soc driver?

Wasn't the point of using the BIT() to not assume alignment of FPGA_MGR
flags and firmware structure?

The FPGA_MGR_* bits are kernel internal and can therefore change, it
would be unfortunate to end up in a situation where this breaks the FW
interface (assuming firmware uses the value in pass-through which it
looks like is what is happening).

> +	} else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) {
> +		dev_dbg(dev, "Requesting bitstream authentication.\n");
> +		ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION;
Do you want to change this to BIT(COMMAND_AUTHENTICATE_BITSTREAM) or
something like that?
>  	} else {
>  		dev_dbg(dev, "Requesting full reconfiguration.\n");
>  	}
> -- 
> 2.7.4
> 

Thanks,
Moritz
Richard Gong Nov. 16, 2020, 2:39 p.m. UTC | #4 
Hi Moritz,

On 11/15/20 1:19 PM, Moritz Fischer wrote:
> On Thu, Nov 12, 2020 at 12:06:43PM -0600, richard.gong@linux.intel.com wrote:
>> From: Richard Gong <richard.gong@intel.com>
>>
>> Exten FPGA manager driver to support FPGA bitstream authentication on
> Nit: Extend

Sorry, I will fix that in version 2.

>> Intel SocFPGA platforms.
>>
>> Signed-off-by: Richard Gong <richard.gong@intel.com>
>> ---
>>   drivers/fpga/stratix10-soc.c | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
>> index 657a70c..8a59365 100644
>> --- a/drivers/fpga/stratix10-soc.c
>> +++ b/drivers/fpga/stratix10-soc.c
>> @@ -185,7 +185,10 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
>>   	ctype.flags = 0;
>>   	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
>>   		dev_dbg(dev, "Requesting partial reconfiguration.\n");
>> -		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
>> +		ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG;
> I think we had this discussion during the original review of the
> stratix10-soc driver?

Yes, we discussed before.

> 
> Wasn't the point of using the BIT() to not assume alignment of FPGA_MGR
> flags and firmware structure?
> 

Yes, we should use BIT().

> The FPGA_MGR_* bits are kernel internal and can therefore change, it
> would be unfortunate to end up in a situation where this breaks the FW
> interface (assuming firmware uses the value in pass-through which it
> looks like is what is happening).

In that case, I should use the flag defined in stratix10-soc driver driver.

> 
>> +	} else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) {
>> +		dev_dbg(dev, "Requesting bitstream authentication.\n");
>> +		ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION;
> Do you want to change this to BIT(COMMAND_AUTHENTICATE_BITSTREAM) or
> something like that?

OK, I will change to BIT(COMMAND_AUTHENTICATE_BITSTREAM).

Regards,
Richard

>>   	} else {
>>   		dev_dbg(dev, "Requesting full reconfiguration.\n");
>>   	}
>> -- 
>> 2.7.4
>>
> 
> Thanks,
> Moritz
>
diff mbox series

Patch

diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
index 657a70c..8a59365 100644
--- a/drivers/fpga/stratix10-soc.c
+++ b/drivers/fpga/stratix10-soc.c
@@ -185,7 +185,10 @@  static int s10_ops_write_init(struct fpga_manager *mgr,
 	ctype.flags = 0;
 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
 		dev_dbg(dev, "Requesting partial reconfiguration.\n");
-		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
+		ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG;
+	} else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) {
+		dev_dbg(dev, "Requesting bitstream authentication.\n");
+		ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION;
 	} else {
 		dev_dbg(dev, "Requesting full reconfiguration.\n");
 	}