diff mbox series

hvf: Gate RDTSCP on CPU_BASED2_RDTSCP, not just CPU_BASED_TSC_OFFSET

Message ID 20201116200319.28138-1-jrtc27@jrtc27.com (mailing list archive)
State New, archived
Headers show
Series hvf: Gate RDTSCP on CPU_BASED2_RDTSCP, not just CPU_BASED_TSC_OFFSET | expand

Commit Message

Jessica Clarke Nov. 16, 2020, 8:03 p.m. UTC
Buglink: https://bugs.launchpad.net/qemu/+bug/1894836
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
---
 target/i386/hvf/x86_cpuid.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Paolo Bonzini Nov. 17, 2020, 8:42 a.m. UTC | #1
On 16/11/20 21:03, Jessica Clarke wrote:
> Buglink: https://bugs.launchpad.net/qemu/+bug/1894836
> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
> ---
>   target/i386/hvf/x86_cpuid.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
> index 16762b6eb4..fc1f87ec57 100644
> --- a/target/i386/hvf/x86_cpuid.c
> +++ b/target/i386/hvf/x86_cpuid.c
> @@ -122,6 +122,10 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
>                   CPUID_PAT | CPUID_PSE36 | CPUID_EXT2_MMXEXT | CPUID_MMX |
>                   CPUID_FXSR | CPUID_EXT2_FXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_3DNOWEXT |
>                   CPUID_EXT2_3DNOW | CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX;
> +        hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
> +        if (!(cap & CPU_BASED2_RDTSCP)) {
> +            edx &= ~CPUID_EXT2_RDTSCP;
> +        }
>           hv_vmx_read_capability(HV_VMX_CAP_PROCBASED, &cap);
>           if (!(cap & CPU_BASED_TSC_OFFSET)) {
>               edx &= ~CPUID_EXT2_RDTSCP;
> 

Queued, thanks.

Paolo
Roman Bolshakov Nov. 18, 2020, 5:08 p.m. UTC | #2
On Mon, Nov 16, 2020 at 08:03:19PM +0000, Jessica Clarke wrote:
> Buglink: https://bugs.launchpad.net/qemu/+bug/1894836
> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
> ---
>  target/i386/hvf/x86_cpuid.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
> index 16762b6eb4..fc1f87ec57 100644
> --- a/target/i386/hvf/x86_cpuid.c
> +++ b/target/i386/hvf/x86_cpuid.c
> @@ -122,6 +122,10 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
>                  CPUID_PAT | CPUID_PSE36 | CPUID_EXT2_MMXEXT | CPUID_MMX |
>                  CPUID_FXSR | CPUID_EXT2_FXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_3DNOWEXT |
>                  CPUID_EXT2_3DNOW | CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX;
> +        hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
> +        if (!(cap & CPU_BASED2_RDTSCP)) {
> +            edx &= ~CPUID_EXT2_RDTSCP;
> +        }
>          hv_vmx_read_capability(HV_VMX_CAP_PROCBASED, &cap);
>          if (!(cap & CPU_BASED_TSC_OFFSET)) {
>              edx &= ~CPUID_EXT2_RDTSCP;
> -- 
> 2.28.0
> 

Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>

Thanks,
Roman
diff mbox series

Patch

diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
index 16762b6eb4..fc1f87ec57 100644
--- a/target/i386/hvf/x86_cpuid.c
+++ b/target/i386/hvf/x86_cpuid.c
@@ -122,6 +122,10 @@  uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
                 CPUID_PAT | CPUID_PSE36 | CPUID_EXT2_MMXEXT | CPUID_MMX |
                 CPUID_FXSR | CPUID_EXT2_FXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_3DNOWEXT |
                 CPUID_EXT2_3DNOW | CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX;
+        hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
+        if (!(cap & CPU_BASED2_RDTSCP)) {
+            edx &= ~CPUID_EXT2_RDTSCP;
+        }
         hv_vmx_read_capability(HV_VMX_CAP_PROCBASED, &cap);
         if (!(cap & CPU_BASED_TSC_OFFSET)) {
             edx &= ~CPUID_EXT2_RDTSCP;