| Message ID | f41e33b12d77e75246fa94ed6acc57fffe84aaa4.1605823502.git.cristian.ciocaltea@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add CMU/RMU/DMA/MMC/I2C support for Actions Semi S500 SoCs | expand |
On Fri, Nov 20, 2020 at 01:56:11AM +0200, Cristian Ciocaltea wrote: > Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC. > For the moment enable only I2C0, which is used by the ATC2603C PMIC. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Earlier we used to add "_default" suffix for the pin groups to differentiate between active and sleep states. But I guess we can just keep the suffix away until we hit usecase. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Thanks, Mani > --- > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 44 ++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > index fe9ae3619422..ff91561ca99c 100644 > --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > @@ -37,7 +37,51 @@ sd_vcc: sd-vcc { > }; > }; > > +&i2c0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c0_pins>; > +}; > + > +&i2c1 { > + status = "disabled"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c1_pins>; > +}; > + > +&i2c2 { > + status = "disabled"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c2_pins>; > +}; > + > &pinctrl { > + i2c0_pins: i2c0-pins { > + pinmux { > + groups = "i2c0_mfp"; > + function = "i2c0"; > + }; > + > + pinconf { > + pins = "i2c0_sclk", "i2c0_sdata"; > + bias-pull-up; > + }; > + }; > + > + i2c1_pins: i2c1-pins { > + pinconf { > + pins = "i2c1_sclk", "i2c1_sdata"; > + bias-pull-up; > + }; > + }; > + > + i2c2_pins: i2c2-pins { > + pinconf { > + pins = "i2c2_sclk", "i2c2_sdata"; > + bias-pull-up; > + }; > + }; > + > mmc0_pins: mmc0-pins { > pinmux { > groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", > -- > 2.29.2 >
On Sat, Nov 28, 2020 at 01:11:08PM +0530, Manivannan Sadhasivam wrote: > On Fri, Nov 20, 2020 at 01:56:11AM +0200, Cristian Ciocaltea wrote: > > Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC. > > For the moment enable only I2C0, which is used by the ATC2603C PMIC. > > > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> > > Earlier we used to add "_default" suffix for the pin groups to > differentiate between active and sleep states. But I guess we can just > keep the suffix away until we hit usecase. I had actually used this suffix when I submitted the first revision of the S500 pinctrl driver, but I dropped it later in the review process since it was considered an uncommon approach: https://lore.kernel.org/lkml/CAL_Jsq+8bX5duv=116e=hve1L-h8a=5quqCHVtSAs4PjK6xc1w@mail.gmail.com/ Thanks, Cristi > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > Thanks, > Mani > > > --- > > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 44 ++++++++++++++++++++++ > > 1 file changed, 44 insertions(+) > > > > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > > index fe9ae3619422..ff91561ca99c 100644 > > --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts > > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > > @@ -37,7 +37,51 @@ sd_vcc: sd-vcc { > > }; > > }; > > > > +&i2c0 { > > + status = "okay"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c0_pins>; > > +}; > > + > > +&i2c1 { > > + status = "disabled"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c1_pins>; > > +}; > > + > > +&i2c2 { > > + status = "disabled"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c2_pins>; > > +}; > > + > > &pinctrl { > > + i2c0_pins: i2c0-pins { > > + pinmux { > > + groups = "i2c0_mfp"; > > + function = "i2c0"; > > + }; > > + > > + pinconf { > > + pins = "i2c0_sclk", "i2c0_sdata"; > > + bias-pull-up; > > + }; > > + }; > > + > > + i2c1_pins: i2c1-pins { > > + pinconf { > > + pins = "i2c1_sclk", "i2c1_sdata"; > > + bias-pull-up; > > + }; > > + }; > > + > > + i2c2_pins: i2c2-pins { > > + pinconf { > > + pins = "i2c2_sclk", "i2c2_sdata"; > > + bias-pull-up; > > + }; > > + }; > > + > > mmc0_pins: mmc0-pins { > > pinmux { > > groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", > > -- > > 2.29.2 > >
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts index fe9ae3619422..ff91561ca99c 100644 --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts @@ -37,7 +37,51 @@ sd_vcc: sd-vcc { }; }; +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; +}; + +&i2c1 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +}; + +&i2c2 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + &pinctrl { + i2c0_pins: i2c0-pins { + pinmux { + groups = "i2c0_mfp"; + function = "i2c0"; + }; + + pinconf { + pins = "i2c0_sclk", "i2c0_sdata"; + bias-pull-up; + }; + }; + + i2c1_pins: i2c1-pins { + pinconf { + pins = "i2c1_sclk", "i2c1_sdata"; + bias-pull-up; + }; + }; + + i2c2_pins: i2c2-pins { + pinconf { + pins = "i2c2_sclk", "i2c2_sdata"; + bias-pull-up; + }; + }; + mmc0_pins: mmc0-pins { pinmux { groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC. For the moment enable only I2C0, which is used by the ATC2603C PMIC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> --- arch/arm/boot/dts/owl-s500-roseapplepi.dts | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+)