| Message ID | 20201022222709.29386-5-manasi.d.navare@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | VRR/Adaptive Sync enabling in i915 | expand |
On Thu, 22 Oct 2020, Manasi Navare <manasi.d.navare@intel.com> wrote: > Introduce VRR struct in intel_crtc_state and add > VRR crtc state variables Enable, Vtotalmin and Vtotalmax > to be derived from mode timings and VRR crtc property. I'd squash this to the patch actually using it. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index f6f0626649e0..f6f7ec024da7 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1092,6 +1092,13 @@ struct intel_crtc_state { > struct intel_dsb *dsb; > > u32 psr2_man_track_ctl; > + > + /* Variable Refresh Rate state */ > + struct { > + bool enable; > + u16 vtotalmin; > + u16 vtotalmax; > + } vrr; > }; > > enum intel_pipe_crc_source {
On Tue, Nov 10, 2020 at 12:41:50PM +0200, Jani Nikula wrote: > On Thu, 22 Oct 2020, Manasi Navare <manasi.d.navare@intel.com> wrote: > > Introduce VRR struct in intel_crtc_state and add > > VRR crtc state variables Enable, Vtotalmin and Vtotalmax > > to be derived from mode timings and VRR crtc property. > > I'd squash this to the patch actually using it. Okay will squash with Patch 5 Manasi > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > > index f6f0626649e0..f6f7ec024da7 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > @@ -1092,6 +1092,13 @@ struct intel_crtc_state { > > struct intel_dsb *dsb; > > > > u32 psr2_man_track_ctl; > > + > > + /* Variable Refresh Rate state */ > > + struct { > > + bool enable; > > + u16 vtotalmin; > > + u16 vtotalmax; > > + } vrr; > > }; > > > > enum intel_pipe_crc_source { > > -- > Jani Nikula, Intel Open Source Graphics Center
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index f6f0626649e0..f6f7ec024da7 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1092,6 +1092,13 @@ struct intel_crtc_state { struct intel_dsb *dsb; u32 psr2_man_track_ctl; + + /* Variable Refresh Rate state */ + struct { + bool enable; + u16 vtotalmin; + u16 vtotalmax; + } vrr; }; enum intel_pipe_crc_source {
Introduce VRR struct in intel_crtc_state and add VRR crtc state variables Enable, Vtotalmin and Vtotalmax to be derived from mode timings and VRR crtc property. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> --- drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ 1 file changed, 7 insertions(+)