Message ID | CALHCpMgQPDqV1tB6v0sA0imwfZGkoG_j84NZCehOT1pf8MTuCA@mail.gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | spi: spi-fsl-dspi: Add GPIO chip select support | expand |
Hi Maxim, On Thu, Dec 03, 2020 at 08:12:19PM +0300, Максим Киселёв wrote: > From: Maxim Kiselev <bigunclemax@gmail.com> > Date: Thu, 3 Dec 2020 18:56:12 +0300 > Subject: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support > > This patch allows use of GPIO for the chip select. > Because dSPI controller can't send transactions without hardware chip > selects, so first unused native CS will be set in SPI_PUSHR_CMD_PCS Are you sure? From the reference manual: SPIx_PUSHR bits 10–15 PCS: Select which PCS signals are to be asserted for the transfer. Refer to the chip-specific SPI information for the number of PCS signals used in this chip. 0 Negate the PCS[x] signal. 1 Assert the PCS[x] signal. And the definition is: #define SPI_PUSHR_CMD_PCS(x) (BIT(x) & GENMASK(5, 0)) Notice the BIT(x). I expect that you can set the PCS to 0 and no hard chip select will assert.
Hi Vladimir, thanks for the answer! I must have missed these. In any case, I would like to add functionality for using GPIO as CS. Because I have a board which actually uses this. I'II check your solution and modify my patch. чт, 3 дек. 2020 г. в 20:50, Vladimir Oltean <olteanv@gmail.com>: > > Hi Maxim, > > On Thu, Dec 03, 2020 at 08:12:19PM +0300, Максим Киселёв wrote: > > From: Maxim Kiselev <bigunclemax@gmail.com> > > Date: Thu, 3 Dec 2020 18:56:12 +0300 > > Subject: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support > > > > This patch allows use of GPIO for the chip select. > > Because dSPI controller can't send transactions without hardware chip > > selects, so first unused native CS will be set in SPI_PUSHR_CMD_PCS > > Are you sure? > > From the reference manual: > > SPIx_PUSHR bits 10–15 PCS: > Select which PCS signals are to be asserted for the transfer. Refer to > the chip-specific SPI information for the number of PCS signals used in > this chip. > 0 Negate the PCS[x] signal. > 1 Assert the PCS[x] signal. > > And the definition is: > > #define SPI_PUSHR_CMD_PCS(x) (BIT(x) & GENMASK(5, 0)) > > Notice the BIT(x). > > I expect that you can set the PCS to 0 and no hard chip select will > assert.
On Thu, Dec 03, 2020 at 09:50:04PM +0300, Maksim Kiselev wrote: > In any case, I would like to add functionality for using GPIO as CS. > Because I have a board which actually uses this. I have absolutely nothing to object to that. But the patches should still be as clean as possible, though.
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 028736687488..d5fba34de740 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -913,9 +913,14 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr, dspi->cur_transfer = transfer; dspi->cur_msg = message; dspi->cur_chip = spi_get_ctldata(spi); + + if (spi->cs_gpiod) + gpiod_set_value(spi->cs_gpiod, 1); + /* Prepare command word for CMD FIFO */ dspi->tx_cmd = SPI_PUSHR_CMD_CTAS(0) | - SPI_PUSHR_CMD_PCS(spi->chip_select); + SPI_PUSHR_CMD_PCS(spi->cs_gpiod ? + ctlr->unused_native_cs : spi->chip_select); if (list_is_last(&dspi->cur_transfer->transfer_list, &dspi->cur_msg->transfers)) {