@@ -455,7 +455,8 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
}
}
}
-#endif
+
+#endif /* !CONFIG_USER_ONLY */
static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
int rw, int tlb_error)
@@ -537,6 +538,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
}
#if !defined(CONFIG_USER_ONLY)
+
hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
MIPSCPU *cpu = MIPS_CPU(cs);
@@ -550,9 +552,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
}
return phys_addr;
}
-#endif
-#if !defined(CONFIG_USER_ONLY)
#if !defined(TARGET_MIPS64)
/*
@@ -886,7 +886,7 @@ refill:
return true;
}
#endif
-#endif
+#endif /* !CONFIG_USER_ONLY */
bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
@@ -1017,7 +1017,7 @@ static const char * const excp_names[EXCP_LAST + 1] = {
[EXCP_MSADIS] = "MSA disabled",
[EXCP_MSAFPE] = "MSA floating point",
};
-#endif
+#endif /* !CONFIG_USER_ONLY */
target_ulong exception_resume_pc(CPUMIPSState *env)
{
@@ -1080,7 +1080,8 @@ static inline void set_badinstr_registers(CPUMIPSState *env)
env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4);
}
}
-#endif
+
+#endif /* !CONFIG_USER_ONLY */
void mips_cpu_do_interrupt(CPUState *cs)
{
@@ -1480,7 +1481,7 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
}
}
}
-#endif
+#endif /* !CONFIG_USER_ONLY */
void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
uint32_t exception,
To help understand ifdef'ry, add comment after #endif. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/helper.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-)