Message ID | 20201118071724.4866-4-wens@kernel.org (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | arm64: rockchip: Fix PCIe ep-gpios requirement and Add Nanopi M4B | expand |
On 2020-11-18 07:17, Chen-Yu Tsai wrote: > From: Chen-Yu Tsai <wens@csie.org> > > Only the NanoPC T4 hs the PCIe reset pin routed to the SoC. For the > NanoPi M4 family, no such signal is routed to the expansion header on > the base board. > > As the schematics for the expansion board were not released, it is > unclear how this is handled, but the likely answer is that the signal > is always pulled high. > > Move the ep-gpios property from the common nanopi4.dtsi file to the > board level nanopc-t4.dts file. This makes the nanopi-m4 lack ep-gpios, > matching the board design. > > A companion patch "PCI: rockchip: make ep_gpio optional" for the Linux > driver is required, as the driver currently requires the property to be > present. I concur that this is a more correct description per the schematics (the SOM-RK3399 Dev Kit carrier board is the only other thing showing PERST# wired up like this), and whatever the M4 hats are doing they clearly aren't doing it with GPIO2_A4 either way. Reviewed-by: Robin Murphy <robin.murphy@arm.com> > Fixes: e7a095908227 ("arm64: dts: rockchip: Add devicetree for NanoPC-T4") > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- > arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts | 1 + > arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 1 - > 2 files changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts > index e0d75617bb7e..452728b82e42 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts > @@ -95,6 +95,7 @@ map3 { > }; > > &pcie0 { > + ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; > num-lanes = <4>; > vpcie3v3-supply = <&vcc3v3_sys>; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi > index 76a8b40a93c6..48ed4aaa37f3 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi > @@ -504,7 +504,6 @@ &pcie_phy { > }; > > &pcie0 { > - ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; > max-link-speed = <2>; > num-lanes = <2>; > vpcie0v9-supply = <&vcca0v9_s3>; >
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts index e0d75617bb7e..452728b82e42 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts @@ -95,6 +95,7 @@ map3 { }; &pcie0 { + ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; num-lanes = <4>; vpcie3v3-supply = <&vcc3v3_sys>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi index 76a8b40a93c6..48ed4aaa37f3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi @@ -504,7 +504,6 @@ &pcie_phy { }; &pcie0 { - ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; max-link-speed = <2>; num-lanes = <2>; vpcie0v9-supply = <&vcca0v9_s3>;