| Message ID | 20201208122855.254819-15-tomi.valkeinen@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Convert DSI code to use drm_mipi_dsi and drm_panel (second half) | expand |
Hi Tomi, Thank you for the patch. On Tue, Dec 08, 2020 at 02:28:40PM +0200, Tomi Valkeinen wrote: > We currently use a single VC for sending commands and pixel data. The > LP/HS mode for pixel data is correctly set to HS by accident, as we have > set the VC to HS already earlier. > > However, if we use a different VC for video data, the VC is in LP mode. > Fix this by always enabling HS mode before starting a frame update. > > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/gpu/drm/omapdrm/dss/dsi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c > index 544f5f1eed91..9d210a020916 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dsi.c > +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c > @@ -3918,6 +3918,8 @@ static int dsi_update_channel(struct omap_dss_device *dssdev, int vc) > > dsi_set_ulps_auto(dsi, false); > > + dsi_vc_enable_hs(dssdev, vc, true); > + > /* > * Send NOP between the frames. If we don't send something here, the > * updates stop working. This is probably related to DSI spec stating
Hi, On Tue, Dec 08, 2020 at 02:28:40PM +0200, Tomi Valkeinen wrote: > We currently use a single VC for sending commands and pixel data. The > LP/HS mode for pixel data is correctly set to HS by accident, as we have > set the VC to HS already earlier. > > However, if we use a different VC for video data, the VC is in LP mode. > Fix this by always enabling HS mode before starting a frame update. > > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > --- Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> -- Sebastian > drivers/gpu/drm/omapdrm/dss/dsi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c > index 544f5f1eed91..9d210a020916 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dsi.c > +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c > @@ -3918,6 +3918,8 @@ static int dsi_update_channel(struct omap_dss_device *dssdev, int vc) > > dsi_set_ulps_auto(dsi, false); > > + dsi_vc_enable_hs(dssdev, vc, true); > + > /* > * Send NOP between the frames. If we don't send something here, the > * updates stop working. This is probably related to DSI spec stating > -- > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki >
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 544f5f1eed91..9d210a020916 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -3918,6 +3918,8 @@ static int dsi_update_channel(struct omap_dss_device *dssdev, int vc) dsi_set_ulps_auto(dsi, false); + dsi_vc_enable_hs(dssdev, vc, true); + /* * Send NOP between the frames. If we don't send something here, the * updates stop working. This is probably related to DSI spec stating
We currently use a single VC for sending commands and pixel data. The LP/HS mode for pixel data is correctly set to HS by accident, as we have set the VC to HS already earlier. However, if we use a different VC for video data, the VC is in LP mode. Fix this by always enabling HS mode before starting a frame update. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> --- drivers/gpu/drm/omapdrm/dss/dsi.c | 2 ++ 1 file changed, 2 insertions(+)