| Message ID | 20201215114828.18076-1-leif@nuviainc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/arm: various changes to cpu.h | expand |
On Tue, 15 Dec 2020 at 11:48, Leif Lindholm <leif@nuviainc.com> wrote: > > First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS). > > Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined > by the ARM ARM. > > Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since > I was unsure of prefererred naming - Ttype7-Ttype1?). > > Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c, > > Lastly, add all ID_ (aarch32) registers/fields. > > Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be > submitting shortly, and some of those features also exist for aarch32. > > v1->v2: > - Correct CCSIDR_EL1 field sizes in 3/5. > - Rebase to current master. What happened to the various Reviewed-by:s that people gave you for patches in the v1 series ? thanks -- PMM
On Tue, Dec 15, 2020 at 12:11:43 +0000, Peter Maydell wrote: > On Tue, 15 Dec 2020 at 11:48, Leif Lindholm <leif@nuviainc.com> wrote: > > > > First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS). > > > > Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined > > by the ARM ARM. > > > > Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since > > I was unsure of prefererred naming - Ttype7-Ttype1?). > > > > Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c, > > > > Lastly, add all ID_ (aarch32) registers/fields. > > > > Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be > > submitting shortly, and some of those features also exist for aarch32. > > > > v1->v2: > > - Correct CCSIDR_EL1 field sizes in 3/5. > > - Rebase to current master. > > What happened to the various Reviewed-by:s that people gave you for > patches in the v1 series ? Melted away in excessive multitasking, sigh. Sorry, v3 coming up. / Leif
First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS). Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined by the ARM ARM. Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since I was unsure of prefererred naming - Ttype7-Ttype1?). Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c, Lastly, add all ID_ (aarch32) registers/fields. Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be submitting shortly, and some of those features also exist for aarch32. v1->v2: - Correct CCSIDR_EL1 field sizes in 3/5. - Rebase to current master. Leif Lindholm (5): target/arm: fix typo in cpu.h ID_AA64PFR1 field name target/arm: make ARMCPU.clidr 64-bit target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h target/arm: add aarch64 ID register fields to cpu.h target/arm: add aarch32 ID register fields to cpu.h target/arm/cpu.h | 71 ++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 69 insertions(+), 2 deletions(-)