| Message ID | 20201215225757.764263-1-f4bug@amsat.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/mips: Convert MSA ASE to decodetree | expand |
On 12/15/20 4:57 PM, Philippe Mathieu-Daudé wrote: > translate_init.c.inc mostly contains CPU definitions. > msa_reset() doesn't belong here, move it with the MSA > helpers. > > One comment style is updated to avoid checkpatch.pl warning. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/internal.h | 2 ++ > target/mips/cpu.c | 1 + > target/mips/mod-msa_helper.c | 36 ++++++++++++++++++++++++++++++++++++ > target/mips/cpu-defs.c.inc | 36 ------------------------------------ > 4 files changed, 39 insertions(+), 36 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 12/15/20 4:57 PM, Philippe Mathieu-Daudé wrote: > Make gen_msa() and gen_msa_branch() public declarations > so we can keep calling them once extracted from the big > translate.c in the next commit. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/translate.h | 2 ++ > target/mips/translate.c | 4 ++-- > 2 files changed, 4 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 12/15/20 11:57 PM, Philippe Mathieu-Daudé wrote: > Philippe Mathieu-Daudé (24): > target/mips/translate: Extract decode_opc_legacy() from decode_opc() > target/mips/translate: Expose check_mips_64() to 32-bit mode > target/mips/cpu: Introduce isa_rel6_available() helper > target/mips: Introduce ase_msa_available() helper > target/mips: Simplify msa_reset() > target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA > target/mips: Simplify MSA TCG logic > target/mips: Remove now unused ASE_MSA definition > target/mips: Alias MSA vector registers on FPU scalar registers > target/mips: Extract msa_translate_init() from mips_tcg_init() > target/mips: Remove CPUMIPSState* argument from gen_msa*() methods > target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ() > target/mips: Rename msa_helper.c as mod-msa_helper.c > target/mips: Move msa_reset() to mod-msa_helper.c > target/mips: Extract MSA helpers from op_helper.c > target/mips: Extract MSA helper definitions > target/mips: Declare gen_msa/_branch() in 'translate.h' > target/mips: Extract MSA translation routines > target/mips: Introduce decode tree bindings for MSA opcodes > target/mips: Use decode_ase_msa() generated from decodetree > target/mips: Extract LSA/DLSA translation generators > target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes > target/mips: Introduce decodetree helpers for Release6 LSA/DLSA > opcodes > target/mips/mod-msa: Pass TCGCond argument to gen_check_zero_element() Thanks, series queued to mips-next (without patch #3 "Introduce isa_rel6_available helper").
Missing review: 1-3 14 17 19-24 Since v1: - rebased - addressed Richard review comments - reworded some commit descriptions - avoid 64-bit ifdef'ry Finally, we use decodetree with the MIPS target. Starting easy with the MSA ASE. 2700+ lines extracted from helper.h and translate.c, now built as an new object: mod-msa_translate.o. Phil. Available: https://gitlab.com/philmd/qemu/-/commits/mips_msa_decodetree_v2 Based-on: <20201214183739.500368-1-f4bug@amsat.org> Philippe Mathieu-Daudé (24): target/mips/translate: Extract decode_opc_legacy() from decode_opc() target/mips/translate: Expose check_mips_64() to 32-bit mode target/mips/cpu: Introduce isa_rel6_available() helper target/mips: Introduce ase_msa_available() helper target/mips: Simplify msa_reset() target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA target/mips: Simplify MSA TCG logic target/mips: Remove now unused ASE_MSA definition target/mips: Alias MSA vector registers on FPU scalar registers target/mips: Extract msa_translate_init() from mips_tcg_init() target/mips: Remove CPUMIPSState* argument from gen_msa*() methods target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ() target/mips: Rename msa_helper.c as mod-msa_helper.c target/mips: Move msa_reset() to mod-msa_helper.c target/mips: Extract MSA helpers from op_helper.c target/mips: Extract MSA helper definitions target/mips: Declare gen_msa/_branch() in 'translate.h' target/mips: Extract MSA translation routines target/mips: Introduce decode tree bindings for MSA opcodes target/mips: Use decode_ase_msa() generated from decodetree target/mips: Extract LSA/DLSA translation generators target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes target/mips/mod-msa: Pass TCGCond argument to gen_check_zero_element() target/mips/cpu.h | 7 + target/mips/helper.h | 436 +-- target/mips/internal.h | 4 +- target/mips/mips-defs.h | 1 - target/mips/translate.h | 25 +- target/mips/isa-mips32r6.decode | 17 + target/mips/isa-mips64r6.decode | 17 + target/mips/mod-msa32.decode | 28 + target/mips/mod-msa64.decode | 17 + target/mips/cpu.c | 14 +- target/mips/isa-mips_rel6_translate.c | 37 + target/mips/kvm.c | 12 +- .../mips/{msa_helper.c => mod-msa_helper.c} | 429 +++ target/mips/mod-msa_translate.c | 2286 ++++++++++++++++ target/mips/op_helper.c | 394 --- target/mips/translate.c | 2352 +---------------- target/mips/translate_addr_const.c | 52 + target/mips/cpu-defs.c.inc | 40 +- target/mips/meson.build | 14 +- target/mips/mod-msa_helper.h.inc | 443 ++++ 20 files changed, 3437 insertions(+), 3188 deletions(-) create mode 100644 target/mips/isa-mips32r6.decode create mode 100644 target/mips/isa-mips64r6.decode create mode 100644 target/mips/mod-msa32.decode create mode 100644 target/mips/mod-msa64.decode create mode 100644 target/mips/isa-mips_rel6_translate.c rename target/mips/{msa_helper.c => mod-msa_helper.c} (93%) create mode 100644 target/mips/mod-msa_translate.c create mode 100644 target/mips/translate_addr_const.c create mode 100644 target/mips/mod-msa_helper.h.inc