| Message ID | 20201215121816.1048557-13-jackmanb@google.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | BPF |
| Headers | show |
| Series | Atomics for eBPF | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | success | Link |
| netdev/fixes_present | success | Link |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Clearly marked for bpf-next |
| netdev/subject_prefix | success | Link |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Link |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | Link |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 32 lines checked |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/header_inline | success | Link |
| netdev/stable | success | Stable not CCed |
On 12/15/20 4:18 AM, Brendan Jackman wrote: > Document new atomic instructions. > > Signed-off-by: Brendan Jackman <jackmanb@google.com> Ack with minor comments below. Acked-by: Yonghong Song <yhs@fb.com> > --- > Documentation/networking/filter.rst | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst > index 1583d59d806d..26d508a5e038 100644 > --- a/Documentation/networking/filter.rst > +++ b/Documentation/networking/filter.rst > @@ -1053,6 +1053,32 @@ encoding. > .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg > .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg > > +The basic atomic operations supported (from architecture v4 onwards) are: Remove "(from architecture v4 onwards)". > + > + BPF_ADD > + BPF_AND > + BPF_OR > + BPF_XOR > + > +Each having equivalent semantics with the ``BPF_ADD`` example, that is: the > +memory location addresed by ``dst_reg + off`` is atomically modified, with > +``src_reg`` as the other operand. If the ``BPF_FETCH`` flag is set in the > +immediate, then these operations also overwrite ``src_reg`` with the > +value that was in memory before it was modified. > + > +The more special operations are: > + > + BPF_XCHG > + > +This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg + > +off``. > + > + BPF_CMPXCHG > + > +This atomically compares the value addressed by ``dst_reg + off`` with > +``R0``. If they match it is replaced with ``src_reg``, The value that was there > +before is loaded back to ``R0``. > + > Note that 1 and 2 byte atomic operations are not supported. Adding something like below. Except xadd for legacy reason, all other 4 byte atomic operations require alu32 mode. The alu32 mode can be enabled with clang flags "-Xclang -target-feature -Xclang +alu32" or "-mcpu=v3". The cpu version 3 has alu32 mode on by default. > > You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to >
On Wed, 16 Dec 2020 at 08:08, Yonghong Song <yhs@fb.com> wrote: > > > > On 12/15/20 4:18 AM, Brendan Jackman wrote: > > Document new atomic instructions. > > > > Signed-off-by: Brendan Jackman <jackmanb@google.com> > > Ack with minor comments below. > > Acked-by: Yonghong Song <yhs@fb.com> > > > --- > > Documentation/networking/filter.rst | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst > > index 1583d59d806d..26d508a5e038 100644 > > --- a/Documentation/networking/filter.rst > > +++ b/Documentation/networking/filter.rst > > @@ -1053,6 +1053,32 @@ encoding. > > .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg > > .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg > > > > +The basic atomic operations supported (from architecture v4 onwards) are: > > Remove "(from architecture v4 onwards)". Oops, thanks. > > + > > + BPF_ADD > > + BPF_AND > > + BPF_OR > > + BPF_XOR > > + > > +Each having equivalent semantics with the ``BPF_ADD`` example, that is: the > > +memory location addresed by ``dst_reg + off`` is atomically modified, with > > +``src_reg`` as the other operand. If the ``BPF_FETCH`` flag is set in the > > +immediate, then these operations also overwrite ``src_reg`` with the > > +value that was in memory before it was modified. > > + > > +The more special operations are: > > + > > + BPF_XCHG > > + > > +This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg + > > +off``. > > + > > + BPF_CMPXCHG > > + > > +This atomically compares the value addressed by ``dst_reg + off`` with > > +``R0``. If they match it is replaced with ``src_reg``, The value that was there > > +before is loaded back to ``R0``. > > + > > Note that 1 and 2 byte atomic operations are not supported. > > Adding something like below. > > Except xadd for legacy reason, all other 4 byte atomic operations > require alu32 mode. > The alu32 mode can be enabled with clang flags "-Xclang -target-feature > -Xclang +alu32" or "-mcpu=v3". The cpu version 3 has alu32 mode on by > default. Thanks, I've written it as: Except ``BPF_ADD`` _without_ ``BPF_FETCH`` (for legacy reasons), all 4 byte atomic operations require alu32 mode. Clang enables this mode by default in architecture v3 (``-mcpu=v3``). For older versions it can be enabled with ``-Xclang -target-feature -Xclang +alu32``. > > > > You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to > >
On 12/16/20 3:44 AM, Brendan Jackman wrote: > On Wed, 16 Dec 2020 at 08:08, Yonghong Song <yhs@fb.com> wrote: >> >> >> >> On 12/15/20 4:18 AM, Brendan Jackman wrote: >>> Document new atomic instructions. >>> >>> Signed-off-by: Brendan Jackman <jackmanb@google.com> >> >> Ack with minor comments below. >> >> Acked-by: Yonghong Song <yhs@fb.com> >> >>> --- >>> Documentation/networking/filter.rst | 26 ++++++++++++++++++++++++++ >>> 1 file changed, 26 insertions(+) >>> >>> diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst >>> index 1583d59d806d..26d508a5e038 100644 >>> --- a/Documentation/networking/filter.rst >>> +++ b/Documentation/networking/filter.rst >>> @@ -1053,6 +1053,32 @@ encoding. >>> .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg >>> .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg >>> >>> +The basic atomic operations supported (from architecture v4 onwards) are: >> >> Remove "(from architecture v4 onwards)". > > Oops, thanks. > >>> + >>> + BPF_ADD >>> + BPF_AND >>> + BPF_OR >>> + BPF_XOR >>> + >>> +Each having equivalent semantics with the ``BPF_ADD`` example, that is: the >>> +memory location addresed by ``dst_reg + off`` is atomically modified, with >>> +``src_reg`` as the other operand. If the ``BPF_FETCH`` flag is set in the >>> +immediate, then these operations also overwrite ``src_reg`` with the >>> +value that was in memory before it was modified. >>> + >>> +The more special operations are: >>> + >>> + BPF_XCHG >>> + >>> +This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg + >>> +off``. >>> + >>> + BPF_CMPXCHG >>> + >>> +This atomically compares the value addressed by ``dst_reg + off`` with >>> +``R0``. If they match it is replaced with ``src_reg``, The value that was there >>> +before is loaded back to ``R0``. >>> + >>> Note that 1 and 2 byte atomic operations are not supported. >> >> Adding something like below. >> >> Except xadd for legacy reason, all other 4 byte atomic operations >> require alu32 mode. >> The alu32 mode can be enabled with clang flags "-Xclang -target-feature >> -Xclang +alu32" or "-mcpu=v3". The cpu version 3 has alu32 mode on by >> default. > > Thanks, I've written it as: > > Except ``BPF_ADD`` _without_ ``BPF_FETCH`` (for legacy reasons), all 4 > byte atomic operations require alu32 mode. Clang enables this mode by > default in architecture v3 (``-mcpu=v3``). For older versions it can > be enabled with ``-Xclang -target-feature -Xclang +alu32``. Sounds good. thanks! > >>> >>> You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to >>>
diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst index 1583d59d806d..26d508a5e038 100644 --- a/Documentation/networking/filter.rst +++ b/Documentation/networking/filter.rst @@ -1053,6 +1053,32 @@ encoding. .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg .imm = BPF_ADD, .code = BPF_ATOMIC | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg +The basic atomic operations supported (from architecture v4 onwards) are: + + BPF_ADD + BPF_AND + BPF_OR + BPF_XOR + +Each having equivalent semantics with the ``BPF_ADD`` example, that is: the +memory location addresed by ``dst_reg + off`` is atomically modified, with +``src_reg`` as the other operand. If the ``BPF_FETCH`` flag is set in the +immediate, then these operations also overwrite ``src_reg`` with the +value that was in memory before it was modified. + +The more special operations are: + + BPF_XCHG + +This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg + +off``. + + BPF_CMPXCHG + +This atomically compares the value addressed by ``dst_reg + off`` with +``R0``. If they match it is replaced with ``src_reg``, The value that was there +before is loaded back to ``R0``. + Note that 1 and 2 byte atomic operations are not supported. You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to
Document new atomic instructions. Signed-off-by: Brendan Jackman <jackmanb@google.com> --- Documentation/networking/filter.rst | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)