| Message ID | 20201216170018.861710-3-kieran.bingham+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a779a0: Add FCP and VSP support | expand |
Hi Kieran, Thank you for the patch. On Wed, Dec 16, 2020 at 05:00:17PM +0000, Kieran Bingham wrote: > Provide VSPD support on the V3U. > > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > index ba6fbbd8710e..a23b4ce2e5f4 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > @@ -133,6 +133,28 @@ fcpvd1: fcp@fea11000 { > resets = <&cpg 509>; > }; > > + vspd0: vsp@fea20000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea20000 0 0x5000>; > + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 830>; > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; > + resets = <&cpg 830>; > + > + renesas,fcp = <&fcpvd0>; > + }; > + > + vspd1: vsp@fea28000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea28000 0 0x5000>; > + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 831>; > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; > + resets = <&cpg 831>; > + > + renesas,fcp = <&fcpvd1>; > + }; > + > prr: chipid@fff00044 { > compatible = "renesas,prr"; > reg = <0 0xfff00044 0 4>;
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index ba6fbbd8710e..a23b4ce2e5f4 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -133,6 +133,28 @@ fcpvd1: fcp@fea11000 { resets = <&cpg 509>; }; + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x5000>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 830>; + + renesas,fcp = <&fcpvd0>; + }; + + vspd1: vsp@fea28000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x5000>; + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 831>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 831>; + + renesas,fcp = <&fcpvd1>; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>;
Provide VSPD support on the V3U. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> --- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)