| Message ID | 20201217093133.1507-8-jgross@suse.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | x86: major paravirt cleanup | expand |
On Thu, Dec 17, 2020 at 10:31:25AM +0100, Juergen Gross wrote: > Instead of only supporting to modify instructions when a specific > feature is set, support doing so for the case a feature is not set. > > As today a feature is specified using a 16 bit quantity and the highest > feature number in use is around 600, using a negated feature number for > specifying the inverted case seems to be appropriate. > > ALTERNATIVE "default_instr", "patched_instr", ~FEATURE_NR > > will start with "default_instr" and patch that with "patched_instr" in > case FEATURE_NR is not set. > > Using that add ALTERNATIVE_TERNARY: > > ALTERNATIVE_TERNARY "default_instr", FEATURE_NR, > "feature_on_instr", "feature_off_instr" > > which will start with "default_instr" and at patch time will, depending > on FEATURE_NR being set or not, patch that with either > "feature_on_instr" or "feature_off_instr". How about an even simpler one (only build-tested): --- diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h index 464034db299f..d52b423d3cab 100644 --- a/arch/x86/include/asm/alternative-asm.h +++ b/arch/x86/include/asm/alternative-asm.h @@ -109,6 +109,9 @@ .popsection .endm +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ + ALTERNATIVE_2 oldinstr, newinstr1, feature, newinstr2, X86_FEATURE_TERNARY + #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_ALTERNATIVE_ASM_H */ diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h index 13adca37c99a..f170cbe89539 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -175,6 +175,9 @@ static inline int alternatives_text_reserved(void *start, void *end) ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ ".popsection\n" +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ + ALTERNATIVE_2(oldinstr, newinstr1, feature, newinstr2, X86_FEATURE_TERNARY) + #define ALTERNATIVE_3(oldinsn, newinsn1, feat1, newinsn2, feat2, newinsn3, feat3) \ OLDINSTR_3(oldinsn, 1, 2, 3) \ ".pushsection .altinstructions,\"a\"\n" \ @@ -206,6 +209,9 @@ static inline int alternatives_text_reserved(void *start, void *end) #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \ asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) ::: "memory") +#define alternative_ternary(oldinstr, feature, newinstr1, newinstr2) \ + asm_inline volatile(ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) ::: "memory") + /* * Alternative inline assembly with input. * diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 84b887825f12..cc634db0b91f 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -108,7 +108,7 @@ #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */ #define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */ #define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */ -/* free ( 3*32+29) */ +#define X86_FEATURE_TERNARY ( 3*32+29) /* "" Synthetic bit for ALTERNATIVE_TERNARY() */ #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */ #define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */ diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index 8d778e46725d..2cb29d4d8dd9 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c @@ -393,7 +393,7 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start, replacement = (u8 *)&a->repl_offset + a->repl_offset; BUG_ON(a->instrlen > sizeof(insn_buff)); BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32); - if (!boot_cpu_has(a->cpuid)) { + if (!boot_cpu_has(a->cpuid) && (a->cpuid != X86_FEATURE_TERNARY)) { if (a->padlen > 1) optimize_nops(a, instr);
On 07.01.21 20:08, Borislav Petkov wrote: > On Thu, Dec 17, 2020 at 10:31:25AM +0100, Juergen Gross wrote: >> Instead of only supporting to modify instructions when a specific >> feature is set, support doing so for the case a feature is not set. >> >> As today a feature is specified using a 16 bit quantity and the highest >> feature number in use is around 600, using a negated feature number for >> specifying the inverted case seems to be appropriate. >> >> ALTERNATIVE "default_instr", "patched_instr", ~FEATURE_NR >> >> will start with "default_instr" and patch that with "patched_instr" in >> case FEATURE_NR is not set. >> >> Using that add ALTERNATIVE_TERNARY: >> >> ALTERNATIVE_TERNARY "default_instr", FEATURE_NR, >> "feature_on_instr", "feature_off_instr" >> >> which will start with "default_instr" and at patch time will, depending >> on FEATURE_NR being set or not, patch that with either >> "feature_on_instr" or "feature_off_instr". > > How about an even simpler one (only build-tested): > > --- > diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h > index 464034db299f..d52b423d3cab 100644 > --- a/arch/x86/include/asm/alternative-asm.h > +++ b/arch/x86/include/asm/alternative-asm.h > @@ -109,6 +109,9 @@ > .popsection > .endm > > +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ > + ALTERNATIVE_2 oldinstr, newinstr1, feature, newinstr2, X86_FEATURE_TERNARY > + > #endif /* __ASSEMBLY__ */ > > #endif /* _ASM_X86_ALTERNATIVE_ASM_H */ > diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h > index 13adca37c99a..f170cbe89539 100644 > --- a/arch/x86/include/asm/alternative.h > +++ b/arch/x86/include/asm/alternative.h > @@ -175,6 +175,9 @@ static inline int alternatives_text_reserved(void *start, void *end) > ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ > ".popsection\n" > > +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ > + ALTERNATIVE_2(oldinstr, newinstr1, feature, newinstr2, X86_FEATURE_TERNARY) > + > #define ALTERNATIVE_3(oldinsn, newinsn1, feat1, newinsn2, feat2, newinsn3, feat3) \ > OLDINSTR_3(oldinsn, 1, 2, 3) \ > ".pushsection .altinstructions,\"a\"\n" \ > @@ -206,6 +209,9 @@ static inline int alternatives_text_reserved(void *start, void *end) > #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \ > asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) ::: "memory") > > +#define alternative_ternary(oldinstr, feature, newinstr1, newinstr2) \ > + asm_inline volatile(ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) ::: "memory") > + > /* > * Alternative inline assembly with input. > * > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 84b887825f12..cc634db0b91f 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -108,7 +108,7 @@ > #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */ > #define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */ > #define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */ > -/* free ( 3*32+29) */ > +#define X86_FEATURE_TERNARY ( 3*32+29) /* "" Synthetic bit for ALTERNATIVE_TERNARY() */ In fact this should rather be named "X86_FEATURE_TRUE", as this is its semantics. And I think I can define it to the value 0xffff instead of using a "real" bit for it. Juergen
On Tue, Jan 19, 2021 at 12:35:42PM +0100, Jürgen Groß wrote: > In fact this should rather be named "X86_FEATURE_TRUE", as this is its > semantics. > > And I think I can define it to the value 0xffff instead of using a > "real" bit for it. A real bit is cheap - a special value to pay attention to in the future not so much. Also we do have X86_FEATURE_ALWAYS already which has a similar purpose...
On 19.01.21 13:06, Borislav Petkov wrote: > On Tue, Jan 19, 2021 at 12:35:42PM +0100, Jürgen Groß wrote: >> In fact this should rather be named "X86_FEATURE_TRUE", as this is its >> semantics. >> >> And I think I can define it to the value 0xffff instead of using a >> "real" bit for it. > > A real bit is cheap - a special value to pay attention to in the future > not so much. Also we do have X86_FEATURE_ALWAYS already which has a > similar purpose... > Oh, well hidden. :-) I'll use that one. Juergen
diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h index 464034db299f..b6989995fddf 100644 --- a/arch/x86/include/asm/alternative-asm.h +++ b/arch/x86/include/asm/alternative-asm.h @@ -109,6 +109,9 @@ .popsection .endm +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ + ALTERNATIVE_2 oldinstr, newinstr1, feature, newinstr2, ~(feature) + #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_ALTERNATIVE_ASM_H */ diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h index 13adca37c99a..a0f8f33609aa 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -59,6 +59,7 @@ struct alt_instr { s32 instr_offset; /* original instruction */ s32 repl_offset; /* offset to replacement instruction */ u16 cpuid; /* cpuid bit set for replacement */ +#define ALT_INSTR_CPUID_INV 0x8000 /* patch if ~cpuid bit is NOT set */ u8 instrlen; /* length of original instruction */ u8 replacementlen; /* length of new instruction */ u8 padlen; /* length of build-time padding */ @@ -175,6 +176,9 @@ static inline int alternatives_text_reserved(void *start, void *end) ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ ".popsection\n" +#define ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) \ + ALTERNATIVE_2(oldinstr, newinstr1, feature, newinstr2, ~(feature)) + #define ALTERNATIVE_3(oldinsn, newinsn1, feat1, newinsn2, feat2, newinsn3, feat3) \ OLDINSTR_3(oldinsn, 1, 2, 3) \ ".pushsection .altinstructions,\"a\"\n" \ @@ -206,6 +210,9 @@ static inline int alternatives_text_reserved(void *start, void *end) #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \ asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) ::: "memory") +#define alternative_ternary(oldinstr, feature, newinstr1, newinstr2) \ + asm_inline volatile(ALTERNATIVE_TERNARY(oldinstr, feature, newinstr1, newinstr2) ::: "memory") + /* * Alternative inline assembly with input. * diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index 8d778e46725d..0a904fb2678b 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c @@ -388,21 +388,28 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start, */ for (a = start; a < end; a++) { int insn_buff_sz = 0; + u16 feature; + bool not_feature; instr = (u8 *)&a->instr_offset + a->instr_offset; replacement = (u8 *)&a->repl_offset + a->repl_offset; + feature = a->cpuid; + not_feature = feature & ALT_INSTR_CPUID_INV; + if (not_feature) + feature = ~feature; BUG_ON(a->instrlen > sizeof(insn_buff)); - BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32); - if (!boot_cpu_has(a->cpuid)) { + BUG_ON(feature >= (NCAPINTS + NBUGINTS) * 32); + if (!!boot_cpu_has(feature) == not_feature) { if (a->padlen > 1) optimize_nops(a, instr); continue; } - DPRINTK("feat: %d*32+%d, old: (%pS (%px) len: %d), repl: (%px, len: %d), pad: %d", - a->cpuid >> 5, - a->cpuid & 0x1f, + DPRINTK("feat: %s%d*32+%d, old: (%pS (%px) len: %d), repl: (%px, len: %d), pad: %d", + not_feature ? "~" : "", + feature >> 5, + feature & 0x1f, instr, instr, a->instrlen, replacement, a->replacementlen, a->padlen);
Instead of only supporting to modify instructions when a specific feature is set, support doing so for the case a feature is not set. As today a feature is specified using a 16 bit quantity and the highest feature number in use is around 600, using a negated feature number for specifying the inverted case seems to be appropriate. ALTERNATIVE "default_instr", "patched_instr", ~FEATURE_NR will start with "default_instr" and patch that with "patched_instr" in case FEATURE_NR is not set. Using that add ALTERNATIVE_TERNARY: ALTERNATIVE_TERNARY "default_instr", FEATURE_NR, "feature_on_instr", "feature_off_instr" which will start with "default_instr" and at patch time will, depending on FEATURE_NR being set or not, patch that with either "feature_on_instr" or "feature_off_instr". Signed-off-by: Juergen Gross <jgross@suse.com> --- V3: - new patch --- arch/x86/include/asm/alternative-asm.h | 3 +++ arch/x86/include/asm/alternative.h | 7 +++++++ arch/x86/kernel/alternative.c | 17 ++++++++++++----- 3 files changed, 22 insertions(+), 5 deletions(-)