| Message ID | 20201204054415.579042-1-david@gibson.dropbear.id.au (mailing list archive) |
|---|---|
| Headers | show |
| Series | Generalize memory encryption models | expand |
On 04.12.20 06:44, David Gibson wrote: > A number of hardware platforms are implementing mechanisms whereby the > hypervisor does not have unfettered access to guest memory, in order > to mitigate the security impact of a compromised hypervisor. > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > its own memory encryption mechanism. POWER has an upcoming mechanism > to accomplish this in a different way, using a new memory protection > level plus a small trusted ultravisor. s390 also has a protected > execution environment. > > The current code (committed or draft) for these features has each > platform's version configured entirely differently. That doesn't seem > ideal for users, or particularly for management layers. > > AMD SEV introduces a notionally generic machine option > "machine-encryption", but it doesn't actually cover any cases other > than SEV. > > This series is a proposal to at least partially unify configuration > for these mechanisms, by renaming and generalizing AMD's > "memory-encryption" property. It is replaced by a > "securable-guest-memory" property pointing to a platform specific Can we do "securable-guest" ? s390x also protects registers and integrity. memory is only one piece of the puzzle and what we protect might differ from platform to platform.
On Fri, Dec 04, 2020 at 04:44:02PM +1100, David Gibson wrote: > A number of hardware platforms are implementing mechanisms whereby the > hypervisor does not have unfettered access to guest memory, in order > to mitigate the security impact of a compromised hypervisor. > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > its own memory encryption mechanism. POWER has an upcoming mechanism > to accomplish this in a different way, using a new memory protection > level plus a small trusted ultravisor. s390 also has a protected > execution environment. > > The current code (committed or draft) for these features has each > platform's version configured entirely differently. That doesn't seem > ideal for users, or particularly for management layers. > > AMD SEV introduces a notionally generic machine option > "machine-encryption", but it doesn't actually cover any cases other > than SEV. > > This series is a proposal to at least partially unify configuration > for these mechanisms, by renaming and generalizing AMD's > "memory-encryption" property. It is replaced by a > "securable-guest-memory" property pointing to a platform specific > object which configures and manages the specific details. There's no docs updated or added in this series. docs/amd-memory-encryption.txt needs an update at least, and there ought to be a doc added describing how this series is to be used for s390/ppc > accel/kvm/kvm-all.c | 39 +------ > accel/kvm/sev-stub.c | 10 +- > accel/stubs/kvm-stub.c | 10 -- > backends/meson.build | 1 + > backends/securable-guest-memory.c | 30 +++++ > hw/core/machine.c | 71 ++++++++++-- > hw/i386/pc_sysfw.c | 6 +- > hw/ppc/meson.build | 1 + > hw/ppc/pef.c | 124 +++++++++++++++++++++ > hw/ppc/spapr.c | 10 ++ > hw/s390x/pv.c | 58 ++++++++++ > include/exec/securable-guest-memory.h | 86 +++++++++++++++ > include/hw/boards.h | 2 +- > include/hw/ppc/pef.h | 26 +++++ > include/hw/s390x/pv.h | 1 + > include/qemu/typedefs.h | 1 + > include/qom/object.h | 3 +- > include/sysemu/kvm.h | 17 --- > include/sysemu/sev.h | 5 +- > qom/object.c | 4 +- > softmmu/vl.c | 16 ++- > target/i386/kvm.c | 12 ++ > target/i386/monitor.c | 1 - > target/i386/sev.c | 153 ++++++++++++-------------- > target/ppc/kvm.c | 18 --- > target/ppc/kvm_ppc.h | 6 - > target/s390x/kvm.c | 3 + > 27 files changed, 510 insertions(+), 204 deletions(-) > create mode 100644 backends/securable-guest-memory.c > create mode 100644 hw/ppc/pef.c > create mode 100644 include/exec/securable-guest-memory.h > create mode 100644 include/hw/ppc/pef.h Regards, Daniel
On Fri, 4 Dec 2020 09:06:50 +0100 Christian Borntraeger <borntraeger@de.ibm.com> wrote: > On 04.12.20 06:44, David Gibson wrote: > > A number of hardware platforms are implementing mechanisms whereby the > > hypervisor does not have unfettered access to guest memory, in order > > to mitigate the security impact of a compromised hypervisor. > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > its own memory encryption mechanism. POWER has an upcoming mechanism > > to accomplish this in a different way, using a new memory protection > > level plus a small trusted ultravisor. s390 also has a protected > > execution environment. > > > > The current code (committed or draft) for these features has each > > platform's version configured entirely differently. That doesn't seem > > ideal for users, or particularly for management layers. > > > > AMD SEV introduces a notionally generic machine option > > "machine-encryption", but it doesn't actually cover any cases other > > than SEV. > > > > This series is a proposal to at least partially unify configuration > > for these mechanisms, by renaming and generalizing AMD's > > "memory-encryption" property. It is replaced by a > > "securable-guest-memory" property pointing to a platform specific > > Can we do "securable-guest" ? > s390x also protects registers and integrity. memory is only one piece > of the puzzle and what we protect might differ from platform to > platform. > I agree. Even technologies that currently only do memory encryption may be enhanced with more protections later.
* Cornelia Huck (cohuck@redhat.com) wrote: > On Fri, 4 Dec 2020 09:06:50 +0100 > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > On 04.12.20 06:44, David Gibson wrote: > > > A number of hardware platforms are implementing mechanisms whereby the > > > hypervisor does not have unfettered access to guest memory, in order > > > to mitigate the security impact of a compromised hypervisor. > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > to accomplish this in a different way, using a new memory protection > > > level plus a small trusted ultravisor. s390 also has a protected > > > execution environment. > > > > > > The current code (committed or draft) for these features has each > > > platform's version configured entirely differently. That doesn't seem > > > ideal for users, or particularly for management layers. > > > > > > AMD SEV introduces a notionally generic machine option > > > "machine-encryption", but it doesn't actually cover any cases other > > > than SEV. > > > > > > This series is a proposal to at least partially unify configuration > > > for these mechanisms, by renaming and generalizing AMD's > > > "memory-encryption" property. It is replaced by a > > > "securable-guest-memory" property pointing to a platform specific > > > > Can we do "securable-guest" ? > > s390x also protects registers and integrity. memory is only one piece > > of the puzzle and what we protect might differ from platform to > > platform. > > > > I agree. Even technologies that currently only do memory encryption may > be enhanced with more protections later. There's already SEV-ES patches onlist for this on the SEV side. <sigh on haggling over the name> Perhaps 'confidential guest' is actually what we need, since the marketing folks seem to have started labelling this whole idea 'confidential computing'. Dave
On Fri, 4 Dec 2020 13:07:27 +0000 "Dr. David Alan Gilbert" <dgilbert@redhat.com> wrote: > * Cornelia Huck (cohuck@redhat.com) wrote: > > On Fri, 4 Dec 2020 09:06:50 +0100 > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > hypervisor does not have unfettered access to guest memory, in order > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > to accomplish this in a different way, using a new memory protection > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > execution environment. > > > > > > > > The current code (committed or draft) for these features has each > > > > platform's version configured entirely differently. That doesn't seem > > > > ideal for users, or particularly for management layers. > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > than SEV. > > > > > > > > This series is a proposal to at least partially unify configuration > > > > for these mechanisms, by renaming and generalizing AMD's > > > > "memory-encryption" property. It is replaced by a > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > Can we do "securable-guest" ? > > > s390x also protects registers and integrity. memory is only one piece > > > of the puzzle and what we protect might differ from platform to > > > platform. > > > > > > > I agree. Even technologies that currently only do memory encryption may > > be enhanced with more protections later. > > There's already SEV-ES patches onlist for this on the SEV side. > > <sigh on haggling over the name> > > Perhaps 'confidential guest' is actually what we need, since the > marketing folks seem to have started labelling this whole idea > 'confidential computing'. It's more like a 'possibly confidential guest', though.
On Fri, Dec 04, 2020 at 01:07:27PM +0000, Dr. David Alan Gilbert wrote: > * Cornelia Huck (cohuck@redhat.com) wrote: > > On Fri, 4 Dec 2020 09:06:50 +0100 > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > hypervisor does not have unfettered access to guest memory, in order > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > to accomplish this in a different way, using a new memory protection > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > execution environment. > > > > > > > > The current code (committed or draft) for these features has each > > > > platform's version configured entirely differently. That doesn't seem > > > > ideal for users, or particularly for management layers. > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > than SEV. > > > > > > > > This series is a proposal to at least partially unify configuration > > > > for these mechanisms, by renaming and generalizing AMD's > > > > "memory-encryption" property. It is replaced by a > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > Can we do "securable-guest" ? > > > s390x also protects registers and integrity. memory is only one piece > > > of the puzzle and what we protect might differ from platform to > > > platform. > > > > > > > I agree. Even technologies that currently only do memory encryption may > > be enhanced with more protections later. > > There's already SEV-ES patches onlist for this on the SEV side. > > <sigh on haggling over the name> > > Perhaps 'confidential guest' is actually what we need, since the > marketing folks seem to have started labelling this whole idea > 'confidential computing'. I think we shouldn't worry about the specific name too much, as it won't be visible much outside QEMU and the internals of the immediate layer above such as libvirt. What matters much more is that we have documentation that clearly explains what the different levels of protection are for each different architecture, and/or generation of architecture. Mgmt apps / end users need understand exactly what kind of unicorns they are being promised for a given configuration. Regards, Daniel
On Fri, 4 Dec 2020 13:25:00 +0000 Daniel P. Berrangé <berrange@redhat.com> wrote: > On Fri, Dec 04, 2020 at 01:07:27PM +0000, Dr. David Alan Gilbert wrote: > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > > hypervisor does not have unfettered access to guest memory, in order > > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > > to accomplish this in a different way, using a new memory protection > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > execution environment. > > > > > > > > > > The current code (committed or draft) for these features has each > > > > > platform's version configured entirely differently. That doesn't seem > > > > > ideal for users, or particularly for management layers. > > > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > > than SEV. > > > > > > > > > > This series is a proposal to at least partially unify configuration > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > "memory-encryption" property. It is replaced by a > > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > > > Can we do "securable-guest" ? > > > > s390x also protects registers and integrity. memory is only one piece > > > > of the puzzle and what we protect might differ from platform to > > > > platform. > > > > > > > > > > I agree. Even technologies that currently only do memory encryption may > > > be enhanced with more protections later. > > > > There's already SEV-ES patches onlist for this on the SEV side. > > > > <sigh on haggling over the name> > > > > Perhaps 'confidential guest' is actually what we need, since the > > marketing folks seem to have started labelling this whole idea > > 'confidential computing'. > > I think we shouldn't worry about the specific name too much, as it > won't be visible much outside QEMU and the internals of the immediate > layer above such as libvirt. What matters much more is that we have > documentation that clearly explains what the different levels of > protection are for each different architecture, and/or generation of > architecture. Mgmt apps / end users need understand exactly what > kind of unicorns they are being promised for a given configuration. > > You are probably right, but I still prefer descriptive names over misleading ones -- it helps with my cognitive process. Regards, Halil
On Fri, Dec 04, 2020 at 02:02:05PM +0100, Cornelia Huck wrote: > On Fri, 4 Dec 2020 09:06:50 +0100 > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > On 04.12.20 06:44, David Gibson wrote: > > > A number of hardware platforms are implementing mechanisms whereby the > > > hypervisor does not have unfettered access to guest memory, in order > > > to mitigate the security impact of a compromised hypervisor. > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > to accomplish this in a different way, using a new memory protection > > > level plus a small trusted ultravisor. s390 also has a protected > > > execution environment. > > > > > > The current code (committed or draft) for these features has each > > > platform's version configured entirely differently. That doesn't seem > > > ideal for users, or particularly for management layers. > > > > > > AMD SEV introduces a notionally generic machine option > > > "machine-encryption", but it doesn't actually cover any cases other > > > than SEV. > > > > > > This series is a proposal to at least partially unify configuration > > > for these mechanisms, by renaming and generalizing AMD's > > > "memory-encryption" property. It is replaced by a > > > "securable-guest-memory" property pointing to a platform specific > > > > Can we do "securable-guest" ? > > s390x also protects registers and integrity. memory is only one piece > > of the puzzle and what we protect might differ from platform to > > platform. > > I agree. Even technologies that currently only do memory encryption may > be enhanced with more protections later. That's a good point. I've focused on the memory aspect because that's what's most immediately relevant to qemu - the fact that we can't directly access guest memory is something we have to deal with, and has some uniformity regardless of the details of the protection scheme.
On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote: > On Fri, 4 Dec 2020 13:07:27 +0000 > "Dr. David Alan Gilbert" <dgilbert@redhat.com> wrote: > > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > > hypervisor does not have unfettered access to guest memory, in order > > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > > to accomplish this in a different way, using a new memory protection > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > execution environment. > > > > > > > > > > The current code (committed or draft) for these features has each > > > > > platform's version configured entirely differently. That doesn't seem > > > > > ideal for users, or particularly for management layers. > > > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > > than SEV. > > > > > > > > > > This series is a proposal to at least partially unify configuration > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > "memory-encryption" property. It is replaced by a > > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > > > Can we do "securable-guest" ? > > > > s390x also protects registers and integrity. memory is only one piece > > > > of the puzzle and what we protect might differ from platform to > > > > platform. > > > > > > > > > > I agree. Even technologies that currently only do memory encryption may > > > be enhanced with more protections later. > > > > There's already SEV-ES patches onlist for this on the SEV side. > > > > <sigh on haggling over the name> > > > > Perhaps 'confidential guest' is actually what we need, since the > > marketing folks seem to have started labelling this whole idea > > 'confidential computing'. That's not a bad idea, much as I usually hate marketing terms. But it does seem to be becoming a general term for this style of thing, and it doesn't overlap too badly with other terms ("secure" and "protected" are also used for hypervisor-from-guest and guest-from-guest protection). > It's more like a 'possibly confidential guest', though. Hmm. What about "Confidential Guest Facility" or "Confidential Guest Mechanism"? The implication being that the facility is there, whether or not the guest actually uses it.
On Tue, 8 Dec 2020 13:57:28 +1100 David Gibson <david@gibson.dropbear.id.au> wrote: > On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote: > > On Fri, 4 Dec 2020 13:07:27 +0000 > > "Dr. David Alan Gilbert" <dgilbert@redhat.com> wrote: > > > > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > > > hypervisor does not have unfettered access to guest memory, in order > > > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > > > to accomplish this in a different way, using a new memory protection > > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > > execution environment. > > > > > > > > > > > > The current code (committed or draft) for these features has each > > > > > > platform's version configured entirely differently. That doesn't seem > > > > > > ideal for users, or particularly for management layers. > > > > > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > > > than SEV. > > > > > > > > > > > > This series is a proposal to at least partially unify configuration > > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > > "memory-encryption" property. It is replaced by a > > > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > > > > > Can we do "securable-guest" ? > > > > > s390x also protects registers and integrity. memory is only one piece > > > > > of the puzzle and what we protect might differ from platform to > > > > > platform. > > > > > > > > > > > > > I agree. Even technologies that currently only do memory encryption may > > > > be enhanced with more protections later. > > > > > > There's already SEV-ES patches onlist for this on the SEV side. > > > > > > <sigh on haggling over the name> > > > > > > Perhaps 'confidential guest' is actually what we need, since the > > > marketing folks seem to have started labelling this whole idea > > > 'confidential computing'. > > That's not a bad idea, much as I usually hate marketing terms. But it > does seem to be becoming a general term for this style of thing, and > it doesn't overlap too badly with other terms ("secure" and > "protected" are also used for hypervisor-from-guest and > guest-from-guest protection). > > > It's more like a 'possibly confidential guest', though. > > Hmm. What about "Confidential Guest Facility" or "Confidential Guest > Mechanism"? The implication being that the facility is there, whether > or not the guest actually uses it. > "Confidential Guest Enablement"? The others generally sound fine to me as well, though; not sure if "Facility" might be a bit confusing, as that term is already a bit overloaded.
On Tue, Dec 08, 2020 at 01:43:08PM +0100, Cornelia Huck wrote: > On Tue, 8 Dec 2020 13:57:28 +1100 > David Gibson <david@gibson.dropbear.id.au> wrote: > > > On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote: > > > On Fri, 4 Dec 2020 13:07:27 +0000 > > > "Dr. David Alan Gilbert" <dgilbert@redhat.com> wrote: > > > > > > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > > > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > > > > hypervisor does not have unfettered access to guest memory, in order > > > > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > > > > to accomplish this in a different way, using a new memory protection > > > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > > > execution environment. > > > > > > > > > > > > > > The current code (committed or draft) for these features has each > > > > > > > platform's version configured entirely differently. That doesn't seem > > > > > > > ideal for users, or particularly for management layers. > > > > > > > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > > > > than SEV. > > > > > > > > > > > > > > This series is a proposal to at least partially unify configuration > > > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > > > "memory-encryption" property. It is replaced by a > > > > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > > > > > > > Can we do "securable-guest" ? > > > > > > s390x also protects registers and integrity. memory is only one piece > > > > > > of the puzzle and what we protect might differ from platform to > > > > > > platform. > > > > > > > > > > > > > > > > I agree. Even technologies that currently only do memory encryption may > > > > > be enhanced with more protections later. > > > > > > > > There's already SEV-ES patches onlist for this on the SEV side. > > > > > > > > <sigh on haggling over the name> > > > > > > > > Perhaps 'confidential guest' is actually what we need, since the > > > > marketing folks seem to have started labelling this whole idea > > > > 'confidential computing'. > > > > That's not a bad idea, much as I usually hate marketing terms. But it > > does seem to be becoming a general term for this style of thing, and > > it doesn't overlap too badly with other terms ("secure" and > > "protected" are also used for hypervisor-from-guest and > > guest-from-guest protection). > > > > > It's more like a 'possibly confidential guest', though. > > > > Hmm. What about "Confidential Guest Facility" or "Confidential Guest > > Mechanism"? The implication being that the facility is there, whether > > or not the guest actually uses it. > > > > "Confidential Guest Enablement"? The others generally sound fine to me > as well, though; not sure if "Facility" might be a bit confusing, as > that term is already a bit overloaded. Well, "facility" is a bit overloaded, but IMO "enablement" is even more so. I think I'll go with "confidential guest support" in the next spin.
On Thu, 17 Dec 2020 17:21:16 +1100 David Gibson <david@gibson.dropbear.id.au> wrote: > On Tue, Dec 08, 2020 at 01:43:08PM +0100, Cornelia Huck wrote: > > On Tue, 8 Dec 2020 13:57:28 +1100 > > David Gibson <david@gibson.dropbear.id.au> wrote: > > > > > On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote: > > > > On Fri, 4 Dec 2020 13:07:27 +0000 > > > > "Dr. David Alan Gilbert" <dgilbert@redhat.com> wrote: > > > > > > > > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > > > > Christian Borntraeger <borntraeger@de.ibm.com> wrote: > > > > > > > > > > > > > On 04.12.20 06:44, David Gibson wrote: > > > > > > > > A number of hardware platforms are implementing mechanisms whereby the > > > > > > > > hypervisor does not have unfettered access to guest memory, in order > > > > > > > > to mitigate the security impact of a compromised hypervisor. > > > > > > > > > > > > > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > > > > > > > its own memory encryption mechanism. POWER has an upcoming mechanism > > > > > > > > to accomplish this in a different way, using a new memory protection > > > > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > > > > execution environment. > > > > > > > > > > > > > > > > The current code (committed or draft) for these features has each > > > > > > > > platform's version configured entirely differently. That doesn't seem > > > > > > > > ideal for users, or particularly for management layers. > > > > > > > > > > > > > > > > AMD SEV introduces a notionally generic machine option > > > > > > > > "machine-encryption", but it doesn't actually cover any cases other > > > > > > > > than SEV. > > > > > > > > > > > > > > > > This series is a proposal to at least partially unify configuration > > > > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > > > > "memory-encryption" property. It is replaced by a > > > > > > > > "securable-guest-memory" property pointing to a platform specific > > > > > > > > > > > > > > Can we do "securable-guest" ? > > > > > > > s390x also protects registers and integrity. memory is only one piece > > > > > > > of the puzzle and what we protect might differ from platform to > > > > > > > platform. > > > > > > > > > > > > > > > > > > > I agree. Even technologies that currently only do memory encryption may > > > > > > be enhanced with more protections later. > > > > > > > > > > There's already SEV-ES patches onlist for this on the SEV side. > > > > > > > > > > <sigh on haggling over the name> > > > > > > > > > > Perhaps 'confidential guest' is actually what we need, since the > > > > > marketing folks seem to have started labelling this whole idea > > > > > 'confidential computing'. > > > > > > That's not a bad idea, much as I usually hate marketing terms. But it > > > does seem to be becoming a general term for this style of thing, and > > > it doesn't overlap too badly with other terms ("secure" and > > > "protected" are also used for hypervisor-from-guest and > > > guest-from-guest protection). > > > > > > > It's more like a 'possibly confidential guest', though. > > > > > > Hmm. What about "Confidential Guest Facility" or "Confidential Guest > > > Mechanism"? The implication being that the facility is there, whether > > > or not the guest actually uses it. > > > > > > > "Confidential Guest Enablement"? The others generally sound fine to me > > as well, though; not sure if "Facility" might be a bit confusing, as > > that term is already a bit overloaded. > > Well, "facility" is a bit overloaded, but IMO "enablement" is even > more so. I think I'll go with "confidential guest support" in the > next spin. > Works for me.
On Fri, Dec 04, 2020 at 09:50:05AM +0000, Daniel P. Berrangé wrote: > On Fri, Dec 04, 2020 at 04:44:02PM +1100, David Gibson wrote: > > A number of hardware platforms are implementing mechanisms whereby the > > hypervisor does not have unfettered access to guest memory, in order > > to mitigate the security impact of a compromised hypervisor. > > > > AMD's SEV implements this with in-cpu memory encryption, and Intel has > > its own memory encryption mechanism. POWER has an upcoming mechanism > > to accomplish this in a different way, using a new memory protection > > level plus a small trusted ultravisor. s390 also has a protected > > execution environment. > > > > The current code (committed or draft) for these features has each > > platform's version configured entirely differently. That doesn't seem > > ideal for users, or particularly for management layers. > > > > AMD SEV introduces a notionally generic machine option > > "machine-encryption", but it doesn't actually cover any cases other > > than SEV. > > > > This series is a proposal to at least partially unify configuration > > for these mechanisms, by renaming and generalizing AMD's > > "memory-encryption" property. It is replaced by a > > "securable-guest-memory" property pointing to a platform specific > > object which configures and manages the specific details. > > There's no docs updated or added in this series. > > docs/amd-memory-encryption.txt needs an update at least, and > there ought to be a doc added describing how this series is > to be used for s390/ppc Fair point, I've made a bunch of doc updates for the next spin.
A number of hardware platforms are implementing mechanisms whereby the hypervisor does not have unfettered access to guest memory, in order to mitigate the security impact of a compromised hypervisor. AMD's SEV implements this with in-cpu memory encryption, and Intel has its own memory encryption mechanism. POWER has an upcoming mechanism to accomplish this in a different way, using a new memory protection level plus a small trusted ultravisor. s390 also has a protected execution environment. The current code (committed or draft) for these features has each platform's version configured entirely differently. That doesn't seem ideal for users, or particularly for management layers. AMD SEV introduces a notionally generic machine option "machine-encryption", but it doesn't actually cover any cases other than SEV. This series is a proposal to at least partially unify configuration for these mechanisms, by renaming and generalizing AMD's "memory-encryption" property. It is replaced by a "securable-guest-memory" property pointing to a platform specific object which configures and manages the specific details. Changes since v4: * Renamed from "host trust limitation" to "securable guest memory", which I think is marginally more descriptive * Re-organized initialization, because the previous model called at kvm_init didn't work for s390 * Assorted fixes to the s390 implementation; rudimentary testing (gitlab CI) only Changes since v3: * Rebased * Added first cut at handling of s390 protected virtualization Changes since RFCv2: * Rebased * Removed preliminary SEV cleanups (they've been merged) * Changed name to "host trust limitation" * Added migration blocker to the PEF code (based on SEV's version) Changes since RFCv1: * Rebased * Fixed some errors pointed out by Dave Gilbert David Gibson (12): securable guest memory: Introduce new securable guest memory base class securable guest memory: Handle memory encryption via interface securable guest memory: Move side effect out of machine_set_memory_encryption() securable guest memory: Rework the "memory-encryption" property securable guest memory: Decouple kvm_memcrypt_*() helpers from KVM sev: Add Error ** to sev_kvm_init() securable guest memory: Introduce sgm "ready" flag securable guest memory: Move SEV initialization into arch specific code spapr: Add PEF based securable guest memory spapr: PEF: prevent migration securable guest memory: Alter virtio default properties for protected guests s390: Recognize securable-guest-memory option Greg Kurz (1): qom: Allow optional sugar props accel/kvm/kvm-all.c | 39 +------ accel/kvm/sev-stub.c | 10 +- accel/stubs/kvm-stub.c | 10 -- backends/meson.build | 1 + backends/securable-guest-memory.c | 30 +++++ hw/core/machine.c | 71 ++++++++++-- hw/i386/pc_sysfw.c | 6 +- hw/ppc/meson.build | 1 + hw/ppc/pef.c | 124 +++++++++++++++++++++ hw/ppc/spapr.c | 10 ++ hw/s390x/pv.c | 58 ++++++++++ include/exec/securable-guest-memory.h | 86 +++++++++++++++ include/hw/boards.h | 2 +- include/hw/ppc/pef.h | 26 +++++ include/hw/s390x/pv.h | 1 + include/qemu/typedefs.h | 1 + include/qom/object.h | 3 +- include/sysemu/kvm.h | 17 --- include/sysemu/sev.h | 5 +- qom/object.c | 4 +- softmmu/vl.c | 16 ++- target/i386/kvm.c | 12 ++ target/i386/monitor.c | 1 - target/i386/sev.c | 153 ++++++++++++-------------- target/ppc/kvm.c | 18 --- target/ppc/kvm_ppc.h | 6 - target/s390x/kvm.c | 3 + 27 files changed, 510 insertions(+), 204 deletions(-) create mode 100644 backends/securable-guest-memory.c create mode 100644 hw/ppc/pef.c create mode 100644 include/exec/securable-guest-memory.h create mode 100644 include/hw/ppc/pef.h