| Message ID | 1609929900-19082-1-git-send-email-shradha.t@samsung.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | [v2] PCI: dwc: Change size to u64 for EP outbound iATU | expand |
> -----Original Message----- > From: Shradha Todi <shradha.t@samsung.com> > Sent: Wednesday, January 6, 2021 4:15 PM > To: linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org > Cc: jingoohan1@gmail.com; gustavo.pimentel@synopsys.com; > robh@kernel.org; lorenzo.pieralisi@arm.com; bhelgaas@google.com; > pankaj.dubey@samsung.com; sriram.dash@samsung.com; > niyas.ahmed@samsung.com; p.rajanbabu@samsung.com; > l.mehra@samsung.com; hari.tv@samsung.com; Shradha Todi > <shradha.t@samsung.com> > Subject: [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU > > Since outbound iATU permits size to be greater than 4GB for which the > support is also available, allow EP function to send u64 size instead of > truncating to u32. > > Signed-off-by: Shradha Todi <shradha.t@samsung.com> > --- > v1: https://lkml.org/lkml/2020/12/18/690 > v2: > Addressed Bjorn's review on to keep commit message length limit to 75 > Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > b/drivers/pci/controller/dwc/pcie-designware.c > index 1d62ca9..db407ed 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -326,7 +326,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie > *pci, int index, int type, > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size) > + u64 size) > { > __dw_pcie_prog_outbound_atu(pci, func_no, index, type, > cpu_addr, pci_addr, size); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > b/drivers/pci/controller/dwc/pcie-designware.h > index 7da79eb..359151f 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -302,7 +302,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie > *pci, int index, > u64 size); > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size); > + u64 size); > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int bar, u64 cpu_addr, > enum dw_pcie_as_type as_type); > -- > 2.7.4
Gentle Ping. Thanks. > -----Original Message----- > From: Shradha Todi <shradha.t@samsung.com> > Subject: [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU > > Since outbound iATU permits size to be greater than 4GB for which the > support is also available, allow EP function to send u64 size instead of > truncating to u32. > > Signed-off-by: Shradha Todi <shradha.t@samsung.com> > --- > v1: https://lkml.org/lkml/2020/12/18/690 > v2: > Addressed Bjorn's review on to keep commit message length limit to 75 > > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > b/drivers/pci/controller/dwc/pcie-designware.c > index 1d62ca9..db407ed 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -326,7 +326,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > int index, int type, > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size) > + u64 size) > { > __dw_pcie_prog_outbound_atu(pci, func_no, index, type, > cpu_addr, pci_addr, size); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > b/drivers/pci/controller/dwc/pcie-designware.h > index 7da79eb..359151f 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -302,7 +302,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > int index, > u64 size); > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size); > + u64 size); > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int bar, u64 cpu_addr, > enum dw_pcie_as_type as_type); > -- > 2.7.4
On Wed, 6 Jan 2021 16:15:00 +0530, Shradha Todi wrote: > Since outbound iATU permits size to be greater than 4GB for which the > support is also available, allow EP function to send u64 size instead of > truncating to u32. Applied to pci/dwc, thanks! [1/1] PCI: dwc: Change size to u64 for EP outbound iATU https://git.kernel.org/lpieralisi/pci/c/95a3472255 Thanks, Lorenzo
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 1d62ca9..db407ed 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -326,7 +326,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size) + u64 size) { __dw_pcie_prog_outbound_atu(pci, func_no, index, type, cpu_addr, pci_addr, size); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 7da79eb..359151f 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -302,7 +302,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, u64 size); void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size); + u64 size); int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, int bar, u64 cpu_addr, enum dw_pcie_as_type as_type);
Since outbound iATU permits size to be greater than 4GB for which the support is also available, allow EP function to send u64 size instead of truncating to u32. Signed-off-by: Shradha Todi <shradha.t@samsung.com> --- v1: https://lkml.org/lkml/2020/12/18/690 v2: Addressed Bjorn's review on to keep commit message length limit to 75 drivers/pci/controller/dwc/pcie-designware.c | 2 +- drivers/pci/controller/dwc/pcie-designware.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)