Message ID | 20191128145554.1297-5-linux@rasmusvillemoes.dk (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | QUICC Engine support on ARM, ARM64, PPC64 | expand |
Hi Rasmus, Le 28/11/2019 à 15:55, Rasmus Villemoes a écrit : > The QUICC engine drivers use the powerpc-specific out_be32() etc. In > order to allow those drivers to build for other architectures, those > must be replaced by iowrite32be(). However, on powerpc, out_be32() is > a simple inline function while iowrite32be() is out-of-line. So in > order not to introduce a performance regression on powerpc when making > the drivers work on other architectures, introduce qe_io* helpers. > > Also define the qe_{clr,set,clrset}bits* helpers in terms of these new > macros. Since commit https://github.com/linuxppc/linux/commit/894fa235eb4ca0bfa692dbe4932c2f940cdc8c1e ioread/iowrite wrappers are also inlined on PPC32, so this commit can now be reverted. Christophe > > Reviewed-by: Timur Tabi <timur@kernel.org> > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > --- > include/soc/fsl/qe/qe.h | 34 +++++++++++++++++++++++++--------- > 1 file changed, 25 insertions(+), 9 deletions(-) > > diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h > index a1aa4eb28f0c..9cac04c692fd 100644 > --- a/include/soc/fsl/qe/qe.h > +++ b/include/soc/fsl/qe/qe.h > @@ -241,21 +241,37 @@ static inline int qe_alive_during_sleep(void) > #define qe_muram_offset cpm_muram_offset > #define qe_muram_dma cpm_muram_dma > > -#define qe_setbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr)) > -#define qe_clrbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr)) > +#ifdef CONFIG_PPC32 > +#define qe_iowrite8(val, addr) out_8(addr, val) > +#define qe_iowrite16be(val, addr) out_be16(addr, val) > +#define qe_iowrite32be(val, addr) out_be32(addr, val) > +#define qe_ioread8(addr) in_8(addr) > +#define qe_ioread16be(addr) in_be16(addr) > +#define qe_ioread32be(addr) in_be32(addr) > +#else > +#define qe_iowrite8(val, addr) iowrite8(val, addr) > +#define qe_iowrite16be(val, addr) iowrite16be(val, addr) > +#define qe_iowrite32be(val, addr) iowrite32be(val, addr) > +#define qe_ioread8(addr) ioread8(addr) > +#define qe_ioread16be(addr) ioread16be(addr) > +#define qe_ioread32be(addr) ioread32be(addr) > +#endif > + > +#define qe_setbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) | (_v), (_addr)) > +#define qe_clrbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) & ~(_v), (_addr)) > > -#define qe_setbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr)) > -#define qe_clrbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr)) > +#define qe_setbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) | (_v), (_addr)) > +#define qe_clrbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) & ~(_v), (_addr)) > > -#define qe_setbits_8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr)) > -#define qe_clrbits_8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr)) > +#define qe_setbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) | (_v), (_addr)) > +#define qe_clrbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) & ~(_v), (_addr)) > > #define qe_clrsetbits_be32(addr, clear, set) \ > - iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr)) > + qe_iowrite32be((qe_ioread32be(addr) & ~(clear)) | (set), (addr)) > #define qe_clrsetbits_be16(addr, clear, set) \ > - iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr)) > + qe_iowrite16be((qe_ioread16be(addr) & ~(clear)) | (set), (addr)) > #define qe_clrsetbits_8(addr, clear, set) \ > - iowrite8((ioread8(addr) & ~(clear)) | (set), (addr)) > + qe_iowrite8((qe_ioread8(addr) & ~(clear)) | (set), (addr)) > > /* Structure that defines QE firmware binary files. > * >
On Tue, Jan 19, 2021 at 11:35 AM Christophe Leroy <christophe.leroy@csgroup.eu> wrote: > > Hi Rasmus, > > Le 28/11/2019 à 15:55, Rasmus Villemoes a écrit : > > The QUICC engine drivers use the powerpc-specific out_be32() etc. In > > order to allow those drivers to build for other architectures, those > > must be replaced by iowrite32be(). However, on powerpc, out_be32() is > > a simple inline function while iowrite32be() is out-of-line. So in > > order not to introduce a performance regression on powerpc when making > > the drivers work on other architectures, introduce qe_io* helpers. > > > > Also define the qe_{clr,set,clrset}bits* helpers in terms of these new > > macros. > > Since commit https://github.com/linuxppc/linux/commit/894fa235eb4ca0bfa692dbe4932c2f940cdc8c1e > ioread/iowrite wrappers are also inlined on PPC32, so this commit can now be reverted. Yes. That will be great. > > Christophe > > > > > Reviewed-by: Timur Tabi <timur@kernel.org> > > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > > --- > > include/soc/fsl/qe/qe.h | 34 +++++++++++++++++++++++++--------- > > 1 file changed, 25 insertions(+), 9 deletions(-) > > > > diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h > > index a1aa4eb28f0c..9cac04c692fd 100644 > > --- a/include/soc/fsl/qe/qe.h > > +++ b/include/soc/fsl/qe/qe.h > > @@ -241,21 +241,37 @@ static inline int qe_alive_during_sleep(void) > > #define qe_muram_offset cpm_muram_offset > > #define qe_muram_dma cpm_muram_dma > > > > -#define qe_setbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr)) > > -#define qe_clrbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr)) > > +#ifdef CONFIG_PPC32 > > +#define qe_iowrite8(val, addr) out_8(addr, val) > > +#define qe_iowrite16be(val, addr) out_be16(addr, val) > > +#define qe_iowrite32be(val, addr) out_be32(addr, val) > > +#define qe_ioread8(addr) in_8(addr) > > +#define qe_ioread16be(addr) in_be16(addr) > > +#define qe_ioread32be(addr) in_be32(addr) > > +#else > > +#define qe_iowrite8(val, addr) iowrite8(val, addr) > > +#define qe_iowrite16be(val, addr) iowrite16be(val, addr) > > +#define qe_iowrite32be(val, addr) iowrite32be(val, addr) > > +#define qe_ioread8(addr) ioread8(addr) > > +#define qe_ioread16be(addr) ioread16be(addr) > > +#define qe_ioread32be(addr) ioread32be(addr) > > +#endif > > + > > +#define qe_setbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) | (_v), (_addr)) > > +#define qe_clrbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) & ~(_v), (_addr)) > > > > -#define qe_setbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr)) > > -#define qe_clrbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr)) > > +#define qe_setbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) | (_v), (_addr)) > > +#define qe_clrbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) & ~(_v), (_addr)) > > > > -#define qe_setbits_8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr)) > > -#define qe_clrbits_8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr)) > > +#define qe_setbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) | (_v), (_addr)) > > +#define qe_clrbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) & ~(_v), (_addr)) > > > > #define qe_clrsetbits_be32(addr, clear, set) \ > > - iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr)) > > + qe_iowrite32be((qe_ioread32be(addr) & ~(clear)) | (set), (addr)) > > #define qe_clrsetbits_be16(addr, clear, set) \ > > - iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr)) > > + qe_iowrite16be((qe_ioread16be(addr) & ~(clear)) | (set), (addr)) > > #define qe_clrsetbits_8(addr, clear, set) \ > > - iowrite8((ioread8(addr) & ~(clear)) | (set), (addr)) > > + qe_iowrite8((qe_ioread8(addr) & ~(clear)) | (set), (addr)) > > > > /* Structure that defines QE firmware binary files. > > * > >
diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h index a1aa4eb28f0c..9cac04c692fd 100644 --- a/include/soc/fsl/qe/qe.h +++ b/include/soc/fsl/qe/qe.h @@ -241,21 +241,37 @@ static inline int qe_alive_during_sleep(void) #define qe_muram_offset cpm_muram_offset #define qe_muram_dma cpm_muram_dma -#define qe_setbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr)) -#define qe_clrbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr)) +#ifdef CONFIG_PPC32 +#define qe_iowrite8(val, addr) out_8(addr, val) +#define qe_iowrite16be(val, addr) out_be16(addr, val) +#define qe_iowrite32be(val, addr) out_be32(addr, val) +#define qe_ioread8(addr) in_8(addr) +#define qe_ioread16be(addr) in_be16(addr) +#define qe_ioread32be(addr) in_be32(addr) +#else +#define qe_iowrite8(val, addr) iowrite8(val, addr) +#define qe_iowrite16be(val, addr) iowrite16be(val, addr) +#define qe_iowrite32be(val, addr) iowrite32be(val, addr) +#define qe_ioread8(addr) ioread8(addr) +#define qe_ioread16be(addr) ioread16be(addr) +#define qe_ioread32be(addr) ioread32be(addr) +#endif + +#define qe_setbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) | (_v), (_addr)) +#define qe_clrbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) & ~(_v), (_addr)) -#define qe_setbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr)) -#define qe_clrbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr)) +#define qe_setbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) | (_v), (_addr)) +#define qe_clrbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) & ~(_v), (_addr)) -#define qe_setbits_8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr)) -#define qe_clrbits_8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr)) +#define qe_setbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) | (_v), (_addr)) +#define qe_clrbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) & ~(_v), (_addr)) #define qe_clrsetbits_be32(addr, clear, set) \ - iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr)) + qe_iowrite32be((qe_ioread32be(addr) & ~(clear)) | (set), (addr)) #define qe_clrsetbits_be16(addr, clear, set) \ - iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr)) + qe_iowrite16be((qe_ioread16be(addr) & ~(clear)) | (set), (addr)) #define qe_clrsetbits_8(addr, clear, set) \ - iowrite8((ioread8(addr) & ~(clear)) | (set), (addr)) + qe_iowrite8((qe_ioread8(addr) & ~(clear)) | (set), (addr)) /* Structure that defines QE firmware binary files. *