Message ID | 20210128072802.830971-4-hsinyi@chromium.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/mediatek: add support for mediatek SOC MT8183 | expand |
Hi, Hsin-Yi: On Thu, 2021-01-28 at 15:27 +0800, Hsin-Yi Wang wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > This patch add RDMA fifo size error handle > rdma fifo size will not always bigger than the calculated threshold > if that case happened, we need set fifo size as the threshold > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > --- > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index b84004394970f..04b9542010b00 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width, > * account for blanking, and with a pixel depth of 4 bytes: > */ > threshold = width * height * vrefresh * 4 * 7 / 1000000; > + > + if (threshold > rdma_fifo_size) > + threshold = rdma_fifo_size; > + Please see the discussion in [1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1607591262-21736-6-git-send-email-yongqiang.niu@mediatek.com/ Regards, CK > reg = RDMA_FIFO_UNDERFLOW_EN | > RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
On Thu, Jan 28, 2021 at 3:52 PM CK Hu <ck.hu@mediatek.com> wrote: > > Hi, Hsin-Yi: > > On Thu, 2021-01-28 at 15:27 +0800, Hsin-Yi Wang wrote: > > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > > > This patch add RDMA fifo size error handle > > rdma fifo size will not always bigger than the calculated threshold > > if that case happened, we need set fifo size as the threshold > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > --- > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > index b84004394970f..04b9542010b00 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width, > > * account for blanking, and with a pixel depth of 4 bytes: > > */ > > threshold = width * height * vrefresh * 4 * 7 / 1000000; > > + > > + if (threshold > rdma_fifo_size) > > + threshold = rdma_fifo_size; > > + > > Please see the discussion in [1]. > > [1] > https://patchwork.kernel.org/project/linux-mediatek/patch/1607591262-21736-6-git-send-email-yongqiang.niu@mediatek.com/ > > Regards, > CK > Hi CK, Even if we set threshold to threshold = RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) * width * height * vrefresh / 2 / MAX_WIDTH / MAX_HEIGHT / MAX_VREFRESH; I'm not sure what value MAX_WIDTH, MAX_HEIGHT, and MAX_VREFRESH should set to for each SoC. Since there's no conclusion yet, I'll drop this patch in the series, as this seems not an mt8183 specific fix. > > reg = RDMA_FIFO_UNDERFLOW_EN | > > RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); >
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index b84004394970f..04b9542010b00 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width, * account for blanking, and with a pixel depth of 4 bytes: */ threshold = width * height * vrefresh * 4 * 7 / 1000000; + + if (threshold > rdma_fifo_size) + threshold = rdma_fifo_size; + reg = RDMA_FIFO_UNDERFLOW_EN | RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);