| Message ID | 20210126090120.19900-8-gabriel.fernandez@foss.st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce STM32MP1 RCC in secured mode | expand |
On Tue, 26 Jan 2021 10:01:13 +0100, gabriel.fernandez@foss.st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > > stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some > PLL output and few secure aware interfaces. > This change defines the SCMI clock identifiers used by SCMI agents > and servers. > Server SCMI0 exposes clocks and reset controllers for resources under > RCC[TZEN] configuration control. > Server SCMI1 exposes clocks for resources under RCC[MCKPROT] control. > > Signed-off-by: Etienne Carriere <etienne.carriere@st.com> > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > --- > include/dt-bindings/clock/stm32mp1-clks.h | 27 +++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h b/include/dt-bindings/clock/stm32mp1-clks.h index 4cdaf135829c..e02770b98e6c 100644 --- a/include/dt-bindings/clock/stm32mp1-clks.h +++ b/include/dt-bindings/clock/stm32mp1-clks.h @@ -248,4 +248,31 @@ #define STM32MP1_LAST_CLK 232 +/* SCMI clock identifiers */ +#define CK_SCMI0_HSE 0 +#define CK_SCMI0_HSI 1 +#define CK_SCMI0_CSI 2 +#define CK_SCMI0_LSE 3 +#define CK_SCMI0_LSI 4 +#define CK_SCMI0_PLL2_Q 5 +#define CK_SCMI0_PLL2_R 6 +#define CK_SCMI0_MPU 7 +#define CK_SCMI0_AXI 8 +#define CK_SCMI0_BSEC 9 +#define CK_SCMI0_CRYP1 10 +#define CK_SCMI0_GPIOZ 11 +#define CK_SCMI0_HASH1 12 +#define CK_SCMI0_I2C4 13 +#define CK_SCMI0_I2C6 14 +#define CK_SCMI0_IWDG1 15 +#define CK_SCMI0_RNG1 16 +#define CK_SCMI0_RTC 17 +#define CK_SCMI0_RTCAPB 18 +#define CK_SCMI0_SPI6 19 +#define CK_SCMI0_USART1 20 + +#define CK_SCMI1_PLL3_Q 0 +#define CK_SCMI1_PLL3_R 1 +#define CK_SCMI1_MCU 2 + #endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */