| Message ID | 20210208114659.15269-2-amelie.delaunay@foss.st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | STM32 USBPHYC ck_usbo_48m clock provider | expand |
On Mon, 08 Feb 2021 12:46:58 +0100, Amelie Delaunay wrote: > usbphyc provides a unique clock called ck_usbo_48m. > STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation. > ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock. > > ck_usbo_48m is available as soon as the PLL is enabled. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> > --- > Changes in v3: > - remove #clock-cells from required properties > --- > Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml index 46df6786727a..018cc1246ee1 100644 --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml @@ -51,6 +51,10 @@ properties: vdda1v8-supply: description: regulator providing 1V8 power supply to the PLL block + '#clock-cells': + description: number of clock cells for ck_usbo_48m consumer + const: 0 + #Required child nodes: patternProperties: @@ -120,6 +124,7 @@ examples: vdda1v8-supply = <®18>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <0>; usbphyc_port0: usb-phy@0 { reg = <0>;
usbphyc provides a unique clock called ck_usbo_48m. STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation. ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock. ck_usbo_48m is available as soon as the PLL is enabled. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- Changes in v3: - remove #clock-cells from required properties --- Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml | 5 +++++ 1 file changed, 5 insertions(+)