| Message ID | 20210215152438.4318-5-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | net: stmmac: Add Toshiba Visconti SoCs glue driver | expand |
Hi Nobuhiro, On Mon, 15 Feb 2021 at 21:00, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> wrote: > > Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file. > And enable this node in TMPV7708 RM main board's board-specific DT file. > > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> > --- > .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 18 +++++++++++++ > arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 25 +++++++++++++++++++ > 2 files changed, 43 insertions(+) > > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > index ed0bf7f13f54..48fa8776e36f 100644 > --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > @@ -41,3 +41,21 @@ &uart1 { > clocks = <&uart_clk>; > clock-names = "apb_pclk"; > }; > + > +&piether { > + status = "okay"; > + phy-handle = <&phy0>; > + phy-mode = "rgmii-id"; > + clocks = <&clk300mhz>, <&clk125mhz>; > + clock-names = "stmmaceth", "phy_ref_clk"; > + > + mdio0 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + phy0: ethernet-phy@1 { > + device_type = "ethernet-phy"; > + reg = <0x1>; This build error was noticed on LKFT builder while building arm64 dtb on linux next 20210216 tag. arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts:52.3-4 syntax error FATAL ERROR: Unable to parse input tree Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> https://gitlab.com/Linaro/lkft/mirrors/next/linux-next/-/jobs/1033072509#L382 -- Linaro LKFT https://lkft.linaro.org
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index ed0bf7f13f54..48fa8776e36f 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -41,3 +41,21 @@ &uart1 { clocks = <&uart_clk>; clock-names = "apb_pclk"; }; + +&piether { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + clocks = <&clk300mhz>, <&clk125mhz>; + clock-names = "stmmaceth", "phy_ref_clk"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 242f25f4e12a..3366786699fc 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -134,6 +134,20 @@ uart_clk: uart-clk { #clock-cells = <0>; }; + clk125mhz: clk125mhz { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + #clock-cells = <0>; + clock-output-names = "clk125mhz"; + }; + + clk300mhz: clk300mhz { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + #clock-cells = <0>; + clock-output-names = "clk300mhz"; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -384,6 +398,17 @@ spi6: spi@28146000 { #size-cells = <0>; status = "disabled"; }; + + piether: ethernet@28000000 { + compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a"; + reg = <0 0x28000000 0 0x10000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + snps,txpbl = <4>; + snps,rxpbl = <4>; + snps,tso; + status = "disabled"; + }; }; };
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file. And enable this node in TMPV7708 RM main board's board-specific DT file. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> --- .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 18 +++++++++++++ arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 25 +++++++++++++++++++ 2 files changed, 43 insertions(+)